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74LV574D,112

1V~5.5V 70MHz D-Type Flip Flop DUAL 74LV574 20μA 74LV Series 20-SOIC (0.295, 7.50mm Width)


  • Manufacturer: NXP USA Inc.
  • Origchip NO: 568-74LV574D,112
  • Package: 20-SOIC (0.295, 7.50mm Width)
  • Datasheet: PDF
  • Stock: 717
  • Description: 1V~5.5V 70MHz D-Type Flip Flop DUAL 74LV574 20μA 74LV Series 20-SOIC (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 20-SOIC (0.295, 7.50mm Width)
Surface Mount YES
Operating Temperature -40°C~125°C TA
Packaging Tube
Published 2009
Series 74LV
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Type D-Type
Terminal Finish NICKEL PALLADIUM GOLD
Additional Feature BROADSIDE VERSION OF 374
Subcategory FF/Latches
Technology CMOS
Voltage - Supply 1V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LV574
JESD-30 Code R-PDSO-G20
Function Standard
Qualification Status Not Qualified
Output Type Tri-State, Non-Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 5.5V
Power Supplies 3.3V
Supply Voltage-Min (Vsup) 1V
Load Capacitance 50pF
Number of Ports 2
Clock Frequency 70MHz
Family LV/LV-A/LVX/H
Current - Quiescent (Iq) 20μA
Output Characteristics 3-STATE
Current - Output High, Low 16mA 16mA
Output Polarity TRUE
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 17ns @ 5V, 50pF
Prop. Delay@Nom-Sup 25 ns
Trigger Type Positive Edge
Input Capacitance 3.5pF
Propagation Delay (tpd) 43 ns
Max Frequency@Nom-Sup 20000000Hz
Height Seated (Max) 2.65mm
Width 7.5mm
RoHS Status ROHS3 Compliant

74LV574D,112 Overview


The flip flop is packaged in 20-SOIC (0.295, 7.50mm Width). A package named Tubeincludes it. T flip flop uses Tri-State, Non-Invertedas its output configuration. It is configured with a trigger that uses Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. With a supply voltage of 1V~5.5V volts, it operates. Temperature is set to -40°C~125°C TA. It belongs to the type D-Typeof flip flops. This type of FPGA is a part of the 74LV series. You should not exceed 70MHzin its output frequency. A total of 1elements are present in it. It consumes 20μA of quiescent current without being affected by external factors. There are 20 terminations,This D latch belongs to the family of 74LV574. A voltage of 3.3V provides power to the D latch. Input capacitance of this device is 3.5pF farads. This D flip flop belongs to the family of LV/LV-A/LVX/H. The part is included in FF/Latches. It reaches 5.5Vwhen the supply voltage is maximal (Vsup). The supply voltage (Vsup) should be maintained above 1V for normal operation. It operates from 3.3V power supplies. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. In addition, you can refer to the additinal BROADSIDE VERSION OF 374 of the D latch.

74LV574D,112 Features


Tube package
74LV series
3.3V power supplies

74LV574D,112 Applications


There are a lot of NXP USA Inc. 74LV574D,112 Flip Flops applications.

  • Event Detectors
  • ESD performance
  • Common Clocks
  • Computers
  • 2 – Bit synchronous counter
  • Safety Clamp
  • Matched Rise and Fall
  • Latch-up performance
  • Control circuits
  • Consumer