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  • 74LV574PW,112

74LV574PW,112

1V~5.5V 70MHz D-Type Flip Flop DUAL 74LV574 160μA 74LV Series 20-TSSOP (0.173, 4.40mm Width)


  • Manufacturer: NXP USA Inc.
  • Origchip NO: 568-74LV574PW,112
  • Package: 20-TSSOP (0.173, 4.40mm Width)
  • Datasheet: PDF
  • Stock: 169
  • Description: 1V~5.5V 70MHz D-Type Flip Flop DUAL 74LV574 160μA 74LV Series 20-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Current - Output High, Low 16mA 16mA
Output Polarity TRUE
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 17ns @ 5V, 50pF
Prop. Delay@Nom-Sup 25 ns
Trigger Type Positive Edge
Input Capacitance 3.5pF
Propagation Delay (tpd) 43 ns
Max Frequency@Nom-Sup 20000000Hz
Length 6.5mm
Width 4.4mm
RoHS Status ROHS3 Compliant
Mounting Type Surface Mount
Package / Case 20-TSSOP (0.173, 4.40mm Width)
Surface Mount YES
Operating Temperature -40°C~125°C TA
Packaging Tube
Published 2009
Series 74LV
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Type D-Type
Terminal Finish NICKEL PALLADIUM GOLD
Additional Feature BROADSIDE VERSION OF 374
Subcategory FF/Latches
Technology CMOS
Voltage - Supply 1V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LV574
JESD-30 Code R-PDSO-G20
Function Standard
Qualification Status Not Qualified
Output Type Tri-State, Non-Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 5.5V
Power Supplies 3.3V
Supply Voltage-Min (Vsup) 1V
Load Capacitance 50pF
Number of Ports 2
Clock Frequency 70MHz
Family LV/LV-A/LVX/H
Current - Quiescent (Iq) 160μA
Output Characteristics 3-STATE

74LV574PW,112 Overview


The item is packaged in 20-TSSOP (0.173, 4.40mm Width)cases. It is contained within the Tubepackage. In the configuration, Tri-State, Non-Invertedis used as the output. In the configuration of the trigger, Positive Edgeis used. The electronic part is mounted in the way of Surface Mount. Powered by a 1V~5.5Vvolt supply, it operates as follows. It is operating at a temperature of -40°C~125°C TA. There is D-Type type of electronic flip flop associated with this device. It belongs to the 74LVseries of FPGAs. Its output frequency should not exceed 70MHz. In total, it contains 1 elements. As a result, it consumes 160μA quiescent current. It has been determined that there have been 20 terminations. JK flip flop belongs to 74LV574 family. The D flip flop is powered by a voltage of 3.3V . This T flip flop has a capacitance of 3.5pF farads at the input. It belongs to the family of electronic devices known as LV/LV-A/LVX/H. This part is included in FF/Latches. The maximal supply voltage (Vsup) reaches 5.5V. If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 1V. An electrical current of 3.3V volts is applied to it. The flip flop has 2ports embedded within it. Additionally, it is characterized by BROADSIDE VERSION OF 374.

74LV574PW,112 Features


Tube package
74LV series
3.3V power supplies

74LV574PW,112 Applications


There are a lot of NXP USA Inc. 74LV574PW,112 Flip Flops applications.

  • Shift Registers
  • Guaranteed simultaneous switching noise level
  • Single Up Count-Control Line
  • Power down protection
  • Circuit Design
  • Communications
  • Instrumentation
  • Patented noise
  • Balanced Propagation Delays
  • Divide a clock signal by 2 or 4