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  • 74LV74DB,112

74LV74DB,112

1V~5.5V 110MHz D-Type Flip Flop DUAL 74LV74 14 Pins 20μA 74LV Series 14-SSOP (0.209, 5.30mm Width)


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74LV74DB,112
  • Package: 14-SSOP (0.209, 5.30mm Width)
  • Datasheet: PDF
  • Stock: 719
  • Description: 1V~5.5V 110MHz D-Type Flip Flop DUAL 74LV74 14 Pins 20μA 74LV Series 14-SSOP (0.209, 5.30mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 8 Weeks
Contact Plating Gold
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 14-SSOP (0.209, 5.30mm Width)
Number of Pins 14
Operating Temperature -40°C~125°C TA
Packaging Tube
Published 2012
Series 74LV
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 14
Type D-Type
Subcategory FF/Latches
Packing Method BULK PACK
Technology CMOS
Voltage - Supply 1V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LV74
Function Set(Preset) and Reset
Output Type Differential
Operating Supply Voltage 3.3V
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 5.5V
Supply Voltage-Min (Vsup) 1V
Number of Channels 2
Load Capacitance 50pF
Clock Frequency 110MHz
Propagation Delay 11 ns
Quiescent Current 80μA
Turn On Delay Time 58 ns
Family LV/LV-A/LVX/H
Logic Function AND, D-Type, Flip-Flop
Current - Quiescent (Iq) 20μA
Current - Output High, Low 12mA 12mA
Max I(ol) 0.006 A
Number of Bits per Element 1
Max Propagation Delay @ V, Max CL 17ns @ 5V, 50pF
Prop. Delay@Nom-Sup 33 ns
Trigger Type Positive Edge
Input Capacitance 3.5pF
Number of Output Lines 1
fmax-Min 48 MHz
Clock Edge Trigger Type Positive Edge
Max Frequency@Nom-Sup 48000000Hz
Width 5.3mm
Radiation Hardening No
RoHS Status RoHS Compliant

74LV74DB,112 Overview


As a result, it is packaged as 14-SSOP (0.209, 5.30mm Width). It is included in the package Tube. Differentialis the output configured for it. This trigger uses the value Positive Edge. Surface Mountis positioned in the way of this electronic part. A voltage of 1V~5.5Vis required for its operation. Temperature is set to -40°C~125°C TA. The type of this D latch is D-Type. It is a type of FPGA belonging to the 74LV series. This D flip flop should not have a frequency greater than 110MHz. There is a consumption of 20μAof quiescent energy. There are 14 terminations,Members of the 74LV74family make up this object. It is powered from a supply voltage of 3.3V. A 3.5pFfarad input capacitance is provided by this T flip flop. Devices in the LV/LV-A/LVX/Hfamily are electronic devices. Surface Mount mounts this electronic component. The electronic flip flop is designed with pins 14. This device exhibits a clock edge trigger type of Positive Edge. The part you are looking for is included in FF/Latches. As soon as Vsup reaches 5.5V, the maximum supply voltage is reached. The supply voltage (Vsup) should be maintained above 1V for normal operation. As a result of its reliable performance, this T flip flop is suitable for BULK PACK. It is recommended that the supply voltage be kept at 3.3Vto maximize efficiency. There are 1 output lines in this JK flip flop. It consumes 80μA current. Currently, there are 2 channels available.

74LV74DB,112 Features


Tube package
74LV series
14 pins

74LV74DB,112 Applications


There are a lot of Nexperia USA Inc. 74LV74DB,112 Flip Flops applications.

  • Control circuits
  • Shift Registers
  • Communications
  • Circuit Design
  • Automotive
  • CMOS Process
  • Storage registers
  • EMI reduction circuitry
  • Consumer
  • Shift registers