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  • 74LV74DB,118

74LV74DB,118

1V~5.5V 110MHz D-Type Flip Flop DUAL 74LV74 14 Pins 20μA 74LV Series 14-SSOP (0.209, 5.30mm Width)


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74LV74DB,118
  • Package: 14-SSOP (0.209, 5.30mm Width)
  • Datasheet: PDF
  • Stock: 186
  • Description: 1V~5.5V 110MHz D-Type Flip Flop DUAL 74LV74 14 Pins 20μA 74LV Series 14-SSOP (0.209, 5.30mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 8 Weeks
Contact Plating Gold
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 14-SSOP (0.209, 5.30mm Width)
Number of Pins 14
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Published 2012
Series 74LV
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 14
Type D-Type
Technology CMOS
Voltage - Supply 1V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LV74
Function Set(Preset) and Reset
Output Type Differential
Operating Supply Voltage 3.3V
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 5.5V
Supply Voltage-Min (Vsup) 1V
Number of Circuits 2
Clock Frequency 110MHz
Propagation Delay 11 ns
Quiescent Current 80μA
Turn On Delay Time 58 ns
Family LV/LV-A/LVX/H
Logic Function AND, D-Type, Flip-Flop
Current - Quiescent (Iq) 20μA
Current - Output High, Low 12mA 12mA
Number of Bits per Element 1
Max Propagation Delay @ V, Max CL 17ns @ 5V, 50pF
Trigger Type Positive Edge
Input Capacitance 3.5pF
Number of Output Lines 1
fmax-Min 56 MHz
Clock Edge Trigger Type Positive Edge
Width 5.3mm
Radiation Hardening No
RoHS Status RoHS Compliant

74LV74DB,118 Overview


It is packaged in the way of 14-SSOP (0.209, 5.30mm Width). Package Tape & Reel (TR)embeds it. T flip flop uses Differentialas its output configuration. This trigger is configured to use Positive Edge. Surface Mountmounts this electrical part. A supply voltage of 1V~5.5V is required for operation. It is operating at -40°C~125°C TA. D-Typedescribes this flip flop. In terms of FPGAs, it belongs to the 74LV series. You should not exceed 110MHzin its output frequency. There is a consumption of 20μAof quiescent energy. There are 14 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. This D latch belongs to the family of 74LV74. Power is provided by a 3.3V supply. Its input capacitance is 3.5pF farads. An electronic device belonging to the family LV/LV-A/LVX/Hcan be found here. This electronic part is mounted in the way of Surface Mount. A total of 14pins are provided on this board. This device exhibits a clock edge trigger type of Positive Edge. There is a 5.5Vmaximum supply voltage (Vsup). Keeping the supply voltage (Vsup) above 1V is necessary for normal operation. In order to achieve its superior flexibility, 2 circuits are used. If high efficiency is desired, the supply voltage should be kept at 3.3V. There are 1 output lines in this JK flip flop. As a result, it consumes 80μA of quiescent current without being affected by external factors.

74LV74DB,118 Features


Tape & Reel (TR) package
74LV series
14 pins

74LV74DB,118 Applications


There are a lot of Nexperia USA Inc. 74LV74DB,118 Flip Flops applications.

  • Consumer
  • Test & Measurement
  • Instrumentation
  • Individual Asynchronous Resets
  • Frequency Dividers
  • Memory
  • Automotive
  • Latch-up performance
  • Storage registers
  • EMI reduction circuitry