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74LVC16374ABX,518

1.65V~3.6V 300MHz 16 Bit D-Type Flip Flop BOTTOM 74LVC16374 60 Pins 20μA 74LVC Series 60-XFQFN Dual Rows, Exposed Pad


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74LVC16374ABX,518
  • Package: 60-XFQFN Dual Rows, Exposed Pad
  • Datasheet: PDF
  • Stock: 776
  • Description: 1.65V~3.6V 300MHz 16 Bit D-Type Flip Flop BOTTOM 74LVC16374 60 Pins 20μA 74LVC Series 60-XFQFN Dual Rows, Exposed Pad(Kg)

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Details

Tags

Parameters
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 60-XFQFN Dual Rows, Exposed Pad
Number of Pins 60
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Published 2010
Series 74LVC
JESD-609 Code e3
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 60
Type D-Type
Terminal Finish MATTE TIN
Subcategory FF/Latches
Packing Method TAPE AND REEL
Max Power Dissipation 1W
Technology CMOS
Voltage - Supply 1.65V~3.6V
Terminal Position BOTTOM
Terminal Form BUTT
Peak Reflow Temperature (Cel) NOT SPECIFIED
Supply Voltage 3.3V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number 74LVC16374
Function Standard
Qualification Status Not Qualified
Output Type Tri-State, Non-Inverted
Number of Elements 2
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 3.3V
Supply Voltage-Min (Vsup) 1.65V
Load Capacitance 50pF
Number of Ports 2
Number of Bits 16
Clock Frequency 300MHz
Propagation Delay 7.5 ns
Quiescent Current 100nA
Turn On Delay Time 7 ns
Family LVC/LCX/Z
Current - Quiescent (Iq) 20μA
Output Characteristics 3-STATE
Current - Output High, Low 24mA 24mA
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 5.4ns @ 3.3V, 50pF
Trigger Type Positive Edge
Input Capacitance 5pF
Clock Edge Trigger Type Positive Edge
Max Frequency@Nom-Sup 100000000Hz
Height Seated (Max) 0.5mm
Length 6mm
Width 4mm
RoHS Status RoHS Compliant

74LVC16374ABX,518 Overview


It is embeded in 60-XFQFN Dual Rows, Exposed Pad case. As part of the package Tape & Reel (TR), it is embedded. It is configured with Tri-State, Non-Invertedas an output. Positive Edgeis the trigger it is configured with. There is an electronic component mounted in the way of Surface Mount. It operates with a supply voltage of 1.65V~3.6V. It is operating at a temperature of -40°C~125°C TA. This logic flip flop is classified as type D-Type. JK flip flop belongs to the 74LVCseries of FPGAs. It should not exceed 300MHzin its output frequency. A total of 2 elements are present. As a result, it consumes 20μA quiescent current. 60terminations have occurred. The 74LVC16374family includes it. A voltage of 3.3V provides power to the D latch. This T flip flop has a capacitance of 5pF farads at the input. In this case, the D flip flop belongs to the LVC/LCX/Zfamily. Surface Mount mounts this electronic component. It is designed with 60 pins. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. This part is included in FF/Latches. Flip flops designed with 16bits are used in this part. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. For normal operation, the supply voltage (Vsup) should be above 1.65V. Considering its reliability, this T flip flop is well suited for TAPE AND REEL. In order for the device to operate, it requires 3.3V power supplies. A D flip flop with 2embedded ports is available. This D latch consumes 100nA quiescent current at all.

74LVC16374ABX,518 Features


Tape & Reel (TR) package
74LVC series
60 pins
16 Bits
3.3V power supplies

74LVC16374ABX,518 Applications


There are a lot of Nexperia USA Inc. 74LVC16374ABX,518 Flip Flops applications.

  • ESD performance
  • Asynchronous counter
  • Individual Asynchronous Resets
  • Supports Live Insertion
  • Synchronous counter
  • QML qualified product
  • Reduced system switching noise
  • Divide a clock signal by 2 or 4
  • Dynamic threshold performance
  • Storage Registers