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74LVC16374APVG

2.7V~3.6V 150MHz D-Type Flip Flop 74LVC16374 10μA 74LVC Series 48-BSSOP (0.295, 7.50mm Width)


  • Manufacturer: Renesas Electronics America Inc.
  • Origchip NO: 668-74LVC16374APVG
  • Package: 48-BSSOP (0.295, 7.50mm Width)
  • Datasheet: PDF
  • Stock: 925
  • Description: 2.7V~3.6V 150MHz D-Type Flip Flop 74LVC16374 10μA 74LVC Series 48-BSSOP (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 48-BSSOP (0.295, 7.50mm Width)
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 74LVC
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Type D-Type
Voltage - Supply 2.7V~3.6V
Base Part Number 74LVC16374
Function Standard
Output Type Tri-State, Non-Inverted
Number of Elements 2
Clock Frequency 150MHz
Current - Quiescent (Iq) 10μA
Current - Output High, Low 24mA 24mA
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 4.5ns @ 3.3V, 50pF
Trigger Type Positive Edge
Input Capacitance 4.5pF

74LVC16374APVG Overview


The flip flop is packaged in a case of 48-BSSOP (0.295, 7.50mm Width). Package Tubeembeds it. The output it is configured with uses Tri-State, Non-Inverted. It is configured with a trigger that uses a value of Positive Edge. There is an electronic component mounted in the way of Surface Mount. A supply voltage of 2.7V~3.6V is required for operation. It is at -40°C~85°C TAdegrees Celsius that the system is operating. This electronic flip flop is of type D-Type. In FPGA terms, D flip flop is a type of 74LVCseries FPGA. A frequency of 150MHzshould be the maximum output frequency. D latch consists of 2 elements. As a result, it consumes 10μA quiescent current. The 74LVC16374 family contains this object. A JK flip flop with a 4.5pFfarad input capacitance is used here.

74LVC16374APVG Features


Tube package
74LVC series

74LVC16374APVG Applications


There are a lot of Renesas Electronics America Inc. 74LVC16374APVG Flip Flops applications.

  • Storage Registers
  • Convert a momentary switch to a toggle switch
  • Circuit Design
  • EMI reduction circuitry
  • Matched Rise and Fall
  • Bus hold
  • Pattern generators
  • Balanced 24 mA output drivers
  • ESD protection
  • Latch