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74LVC1G175GM,115

1.65V~5.5V 200MHz 1 Bit D-Type Flip Flop DUAL 74LVC1G175 6 Pins 40μA 74LVC Series 6-XFDFN


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74LVC1G175GM,115
  • Package: 6-XFDFN
  • Datasheet: PDF
  • Stock: 683
  • Description: 1.65V~5.5V 200MHz 1 Bit D-Type Flip Flop DUAL 74LVC1G175 6 Pins 40μA 74LVC Series 6-XFDFN(Kg)

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Details

Tags

Parameters
Height Seated (Max) 0.5mm
Radiation Hardening No
RoHS Status ROHS3 Compliant
Lead Free Lead Free
Factory Lead Time 13 Weeks
Contact Plating Tin
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 6-XFDFN
Number of Pins 6
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Published 2013
Series 74LVC
JESD-609 Code e3
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 6
Type D-Type
Technology CMOS
Voltage - Supply 1.65V~5.5V
Terminal Position DUAL
Peak Reflow Temperature (Cel) 260
Supply Voltage 2.7V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) 40
Base Part Number 74LVC1G175
Function Reset
Output Type Non-Inverted
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 5.5V
Number of Circuits 1
Number of Bits 1
Clock Frequency 200MHz
Propagation Delay 3.1 ns
Quiescent Current 100nA
Turn On Delay Time 2.2 ns
Family LVC/LCX/Z
Logic Function D-Type, Flip-Flop
Current - Quiescent (Iq) 40μA
Current - Output High, Low 32mA 32mA
Max Propagation Delay @ V, Max CL 4ns @ 5V, 50pF
Trigger Type Positive Edge
Input Capacitance 2.5pF
fmax-Min 200 MHz
Clock Edge Trigger Type Positive Edge

74LVC1G175GM,115 Overview


In the form of 6-XFDFN, it has been packaged. Package Tape & Reel (TR)embeds it. Non-Invertedis the output configured for it. This trigger is configured to use Positive Edge. Surface Mountmounts this electrical part. The JK flip flop operates at a voltage of 1.65V~5.5V. It is at -40°C~125°C TAdegrees Celsius that the system is operating. It belongs to the type D-Typeof flip flops. FPGAs belonging to the 74LVCseries contain this type of chip. It should not exceed 200MHzin terms of its output frequency. It consumes 40μA of quiescent There have been 6 terminations. If you search by 74LVC1G175, you will find similar parts. A voltage of 2.7V is used as the power supply for this D latch. The input capacitance of this T flip flop is 2.5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. A device of this type belongs to the family of LVC/LCX/Z. There is an electronic part that is mounted in the way of Surface Mount. 6pins are included in its design. There is a clock edge trigger type of Positive Edgeon this device. An electronic part designed with 1bits is used in this application. There is a 5.5Vmaximum supply voltage (Vsup). In order to achieve its superior flexibility, 1 circuits are used. As a result, it consumes 100nA of quiescent current without being affected by external factors.

74LVC1G175GM,115 Features


Tape & Reel (TR) package
74LVC series
6 pins
1 Bits

74LVC1G175GM,115 Applications


There are a lot of Nexperia USA Inc. 74LVC1G175GM,115 Flip Flops applications.

  • Clock pulse
  • ESCC
  • Cold spare funcion
  • Guaranteed simultaneous switching noise level
  • Memory
  • Computing
  • Functionally equivalent to the MC10/100EL29
  • Balanced Propagation Delays
  • Control circuits
  • Modulo – n – counter