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  • 74LVC1G175GS,132

74LVC1G175GS,132

1.65V~5.5V 200MHz 1 Bit D-Type Flip Flop DUAL 74LVC1G175 6 Pins 40μA 74LVC Series 6-XFDFN


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74LVC1G175GS,132
  • Package: 6-XFDFN
  • Datasheet: PDF
  • Stock: 910
  • Description: 1.65V~5.5V 200MHz 1 Bit D-Type Flip Flop DUAL 74LVC1G175 6 Pins 40μA 74LVC Series 6-XFDFN(Kg)

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Details

Tags

Parameters
Factory Lead Time 13 Weeks
Contact Plating Tin
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 6-XFDFN
Number of Pins 6
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Published 2009
Series 74LVC
JESD-609 Code e3
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 6
Type D-Type
Max Power Dissipation 250mW
Technology CMOS
Voltage - Supply 1.65V~5.5V
Terminal Position DUAL
Terminal Form NO LEAD
Peak Reflow Temperature (Cel) NOT SPECIFIED
Supply Voltage 1.8V
Terminal Pitch 0.35mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number 74LVC1G175
Function Reset
Output Type Non-Inverted
Number of Elements 1
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 5.5V
Number of Bits 1
Clock Frequency 200MHz
Propagation Delay 17 ns
Quiescent Current 100nA
Turn On Delay Time 2.2 ns
Family LVC/LCX/Z
Current - Quiescent (Iq) 40μA
Current - Output High, Low 32mA 32mA
Max Propagation Delay @ V, Max CL 4ns @ 5V, 50pF
Trigger Type Positive Edge
Input Capacitance 2.5pF
fmax-Min 200 MHz
Clock Edge Trigger Type Positive Edge
Height Seated (Max) 0.35mm
RoHS Status ROHS3 Compliant

74LVC1G175GS,132 Overview


The flip flop is packaged in 6-XFDFN. D flip flop is embedded in the Tape & Reel (TR) package. T flip flop is configured with an output of Non-Inverted. It is configured with a trigger that uses a value of Positive Edge. This electronic part is mounted in the way of Surface Mount. A voltage of 1.65V~5.5Vis used as the supply voltage. -40°C~125°C TAis the operating temperature. This D latch has the type D-Type. In FPGA terms, D flip flop is a type of 74LVCseries FPGA. This D flip flop should not have a frequency greater than 200MHz. D latch consists of 1 elements. There is 40μA quiescent consumption. It has been determined that there have been 6 terminations. The 74LVC1G175family includes it. The D flip flop is powered by a voltage of 1.8V . A JK flip flop with a 2.5pFfarad input capacitance is used here. A device of this type belongs to the family of LVC/LCX/Z. Electronic part Surface Mountis mounted in the way. The 6pins are designed into the board. This device has Positive Edgeas its clock edge trigger type. An electronic part with 1bits has been designed. It reaches 5.5Vwhen the supply voltage is maximal (Vsup). This D latch consumes 100nA quiescent current at all.

74LVC1G175GS,132 Features


Tape & Reel (TR) package
74LVC series
6 pins
1 Bits

74LVC1G175GS,132 Applications


There are a lot of Nexperia USA Inc. 74LVC1G175GS,132 Flip Flops applications.

  • Digital electronics systems
  • Circuit Design
  • Communications
  • Common Clocks
  • Buffer registers
  • Convert a momentary switch to a toggle switch
  • Event Detectors
  • Load Control
  • Bounce elimination switch
  • QML qualified product