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  • 74LVC1G74DP,125

74LVC1G74DP,125

1.65V~5.5V 200MHz 1 Bit D-Type Flip Flop DUAL 74LVC1G74 8 Pins 40μA 74LVC Series 8-TSSOP, 8-MSOP (0.118, 3.00mm Width)


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74LVC1G74DP,125
  • Package: 8-TSSOP, 8-MSOP (0.118, 3.00mm Width)
  • Datasheet: PDF
  • Stock: 225
  • Description: 1.65V~5.5V 200MHz 1 Bit D-Type Flip Flop DUAL 74LVC1G74 8 Pins 40μA 74LVC Series 8-TSSOP, 8-MSOP (0.118, 3.00mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 4 Weeks
Mounting Type Surface Mount
Package / Case 8-TSSOP, 8-MSOP (0.118, 3.00mm Width)
Surface Mount YES
Number of Pins 8
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Published 2008
Series 74LVC
JESD-609 Code e4
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 8
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Technology CMOS
Voltage - Supply 1.65V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.8V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LVC1G74
Function Set(Preset) and Reset
Qualification Status Not Qualified
Output Type Differential
Number of Elements 1
Supply Voltage-Max (Vsup) 5.5V
Output Current 50mA
Number of Bits 1
Clock Frequency 200MHz
Family LVC/LCX/Z
Current - Quiescent (Iq) 40μA
Current - Output High, Low 32mA 32mA
Output Polarity COMPLEMENTARY
Max Propagation Delay @ V, Max CL 4.1ns @ 5V, 50pF
Trigger Type Positive Edge
Input Capacitance 4pF
fmax-Min 200 MHz
Length 3mm
Width 3mm
RoHS Status ROHS3 Compliant

74LVC1G74DP,125 Overview


8-TSSOP, 8-MSOP (0.118, 3.00mm Width)is the packaging method. Package Tape & Reel (TR)embeds it. T flip flop uses Differentialas its output configuration. This trigger is configured to use Positive Edge. Surface Mountmounts this electrical part. With a supply voltage of 1.65V~5.5V volts, it operates. It is at -40°C~125°C TAdegrees Celsius that the system is operating. It belongs to the type D-Typeof flip flops. The 74LVCseries comprises this type of FPGA. A frequency of 200MHzshould not be exceeded by its output. In total, there are 1 elements. This process consumes 40μA quiescents. It has been determined that there have been 8 terminations. JK flip flop belongs to 74LVC1G74 family. A voltage of 1.8V provides power to the D latch. This JK flip flop has a 4pFfarad input capacitance. In this case, the D flip flop belongs to the LVC/LCX/Zfamily. There are 8pins on it. It is designed with a number of bits of 1. In this case, the maximum supply voltage (Vsup) reaches 5.5V. In addition to its maximum design flexibility, the output current of the T flip flop is 50mA.

74LVC1G74DP,125 Features


Tape & Reel (TR) package
74LVC series
8 pins
1 Bits

74LVC1G74DP,125 Applications


There are a lot of Nexperia USA Inc. 74LVC1G74DP,125 Flip Flops applications.

  • CMOS Process
  • Buffer registers
  • Matched Rise and Fall
  • Data Synchronizers
  • Consumer
  • Convert a momentary switch to a toggle switch
  • Data transfer
  • Data storage
  • Load Control
  • Shift Registers