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  • 74LVC1G74GD,125

74LVC1G74GD,125

1.65V~5.5V 200MHz 1 Bit D-Type Flip Flop DUAL 74LVC1G74 8 Pins 40μA 74LVC Series 8-XFDFN


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74LVC1G74GD,125
  • Package: 8-XFDFN
  • Datasheet: PDF
  • Stock: 404
  • Description: 1.65V~5.5V 200MHz 1 Bit D-Type Flip Flop DUAL 74LVC1G74 8 Pins 40μA 74LVC Series 8-XFDFN(Kg)

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Details

Tags

Parameters
Factory Lead Time 8 Weeks
Contact Plating Gold
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 8-XFDFN
Number of Pins 8
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Published 2005
Series 74LVC
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 8
Type D-Type
Subcategory FF/Latches
Packing Method TAPE AND REEL
Technology CMOS
Voltage - Supply 1.65V~5.5V
Terminal Position DUAL
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.8V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LVC1G74
Function Set(Preset) and Reset
Output Type Differential
Polarity Non-Inverting
Power Supplies 3.3V
Number of Circuits 1
Number of Bits 1
Clock Frequency 200MHz
Propagation Delay 3.5 ns
Quiescent Current 100nA
Turn On Delay Time 2.5 ns
Family LVC/LCX/Z
Logic Function AND, D-Type
Current - Quiescent (Iq) 40μA
Current - Output High, Low 32mA 32mA
Max I(ol) 0.024 A
Max Propagation Delay @ V, Max CL 4.1ns @ 5V, 50pF
Prop. Delay@Nom-Sup 5.9 ns
Trigger Type Positive Edge
Input Capacitance 4pF
fmax-Min 200 MHz
Max Supply Voltage (DC) 5.5V
Clock Edge Trigger Type Positive Edge
Height Seated (Max) 0.5mm
Length 3mm
Width 2mm
Radiation Hardening No
RoHS Status RoHS Compliant
Lead Free Lead Free

74LVC1G74GD,125 Overview


The package is in the form of 8-XFDFN. There is an embedded version in the package Tape & Reel (TR). The output it is configured with uses Differential. The trigger configured with it uses Positive Edge. Surface Mountmounts this electrical part. The JK flip flop operates at a voltage of 1.65V~5.5V. It is at -40°C~125°C TAdegrees Celsius that the system is operating. This D latch has the type D-Type. JK flip flop is a part of the 74LVCseries of FPGAs. This D flip flop should not have a frequency greater than 200MHz. There is 40μA quiescent consumption. Terminations are 8. The object belongs to the 74LVC1G74 family. An input voltage of 1.8Vpowers the D latch. Input capacitance of this device is 4pF farads. In this case, the D flip flop belongs to the LVC/LCX/Zfamily. There is an electronic component mounted in the way of Surface Mount. 8pins are included in its design. This device's clock edge trigger type is Positive Edge. This part is included in FF/Latches. An electronic part with 1bits has been designed. The superior flexibility of this product is achieved by using 1 circuits. Considering its reliability, this T flip flop is well suited for TAPE AND REEL. There are 3.3V power supplies attached to it. It consumes 100nA current.

74LVC1G74GD,125 Features


Tape & Reel (TR) package
74LVC series
8 pins
1 Bits
3.3V power supplies

74LVC1G74GD,125 Applications


There are a lot of Nexperia USA Inc. 74LVC1G74GD,125 Flip Flops applications.

  • Buffer registers
  • 2 – Bit synchronous counter
  • Memory
  • Event Detectors
  • Load Control
  • Frequency division
  • Test & Measurement
  • Circuit Design
  • Data transfer
  • Convert a momentary switch to a toggle switch