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  • 74LVC273D,112

74LVC273D,112

1.65V~3.6V 230MHz 8 Bit D-Type Flip Flop DUAL 74LVC273 20 Pins 74LVC Series 20-SOIC (0.295, 7.50mm Width)


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74LVC273D,112
  • Package: 20-SOIC (0.295, 7.50mm Width)
  • Datasheet: PDF
  • Stock: 885
  • Description: 1.65V~3.6V 230MHz 8 Bit D-Type Flip Flop DUAL 74LVC273 20 Pins 74LVC Series 20-SOIC (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 4 Weeks
Contact Plating Gold
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 20-SOIC (0.295, 7.50mm Width)
Number of Pins 20
Operating Temperature -40°C~125°C TA
Packaging Tube
Published 2003
Series 74LVC
JESD-609 Code e4
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Type D-Type
Technology CMOS
Voltage - Supply 1.65V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.8V
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LVC273
Function Master Reset
Output Type Non-Inverted
Number of Elements 1
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 3.6V
Number of Bits 8
Clock Frequency 230MHz
Propagation Delay 11.5 ns
Quiescent Current 10μA
Turn On Delay Time 1.5 ns
Family LVC/LCX/Z
Logic Function D-Type, Flip-Flop
Current - Output High, Low 24mA 24mA
Max Propagation Delay @ V, Max CL 8.2ns @ 3.3V, 50pF
Trigger Type Positive Edge
Input Capacitance 5pF
Number of Input Lines 8
Clock Edge Trigger Type Positive Edge
Height Seated (Max) 2.65mm
Width 7.5mm
Radiation Hardening No
RoHS Status ROHS3 Compliant
Lead Free Lead Free

74LVC273D,112 Overview


The package is in the form of 20-SOIC (0.295, 7.50mm Width). It is contained within the Tubepackage. Currently, the output is configured to use Non-Inverted. It is configured with a trigger that uses Positive Edge. The electronic part is mounted in the way of Surface Mount. A voltage of 1.65V~3.6Vis required for its operation. A temperature of -40°C~125°C TAis used in the operation. It is an electronic flip flop with the type D-Type. It belongs to the 74LVCseries of FPGAs. It should not exceed 230MHzin terms of its output frequency. D latch consists of 1 elements. Terminations are 20. JK flip flop belongs to 74LVC273 family. It is powered from a supply voltage of 1.8V. The input capacitance of this T flip flop is 5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. Devices in the LVC/LCX/Zfamily are electronic devices. In this case, the electronic component is mounted in the way of Surface Mount. With its 20pins, it is designed to work with most electronic flip flops. This device has Positive Edgeas its clock edge trigger type. It is designed with 8bits. In this case, the maximum supply voltage (Vsup) reaches 3.6V. A total of 8input lines have been provided. Quiescent current is consumed by the D latch in the amount of 10μA.

74LVC273D,112 Features


Tube package
74LVC series
20 pins
8 Bits

74LVC273D,112 Applications


There are a lot of Nexperia USA Inc. 74LVC273D,112 Flip Flops applications.

  • Dynamic threshold performance
  • Count Modes
  • Communications
  • Bounce elimination switch
  • Storage registers
  • Guaranteed simultaneous switching noise level
  • Buffered Clock
  • EMI reduction circuitry
  • Differential Individual
  • Shift Registers