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  • 74LVC2G74GM,125

74LVC2G74GM,125

1.65V~5.5V 200MHz 1 Bit D-Type Flip Flop QUAD 74LVC2G74 8 Pins 40μA 74LVC Series 8-XFQFN Exposed Pad


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74LVC2G74GM,125
  • Package: 8-XFQFN Exposed Pad
  • Datasheet: PDF
  • Stock: 818
  • Description: 1.65V~5.5V 200MHz 1 Bit D-Type Flip Flop QUAD 74LVC2G74 8 Pins 40μA 74LVC Series 8-XFQFN Exposed Pad(Kg)

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Details

Tags

Parameters
Factory Lead Time 20 Weeks
Contact Plating Gold
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 8-XFQFN Exposed Pad
Number of Pins 8
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Series 74LVC
JESD-609 Code e4
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 8
Type D-Type
Technology CMOS
Voltage - Supply 1.65V~5.5V
Terminal Position QUAD
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.8V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) 40
Base Part Number 74LVC2G74
Function Set(Preset) and Reset
Output Type Differential
Polarity Non-Inverting
Number of Circuits 1
Number of Bits 1
Clock Frequency 200MHz
Propagation Delay 3.5 ns
Quiescent Current 100nA
Turn On Delay Time 2.5 ns
Family LVC/LCX/Z
Logic Function AND, D-Type
Current - Quiescent (Iq) 40μA
Current - Output High, Low 32mA 32mA
Max Propagation Delay @ V, Max CL 4.1ns @ 5V, 50pF
Trigger Type Positive Edge
Input Capacitance 4pF
fmax-Min 200 MHz
Max Supply Voltage (DC) 5.5V
Clock Edge Trigger Type Positive Edge
Height Seated (Max) 0.5mm
Radiation Hardening No
RoHS Status ROHS3 Compliant
Lead Free Lead Free

74LVC2G74GM,125 Overview


The flip flop is packaged in 8-XFQFN Exposed Pad. The Tape & Reel (TR)package contains it. Differentialis the output configured for it. This trigger is configured to use Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. A supply voltage of 1.65V~5.5V is required for operation. In the operating environment, the temperature is -40°C~125°C TA. This logic flip flop is classified as type D-Type. JK flip flop is a part of the 74LVCseries of FPGAs. In order for it to function properly, its output frequency should not exceed 200MHz. T flip flop consumes 40μA quiescent energy. There are 8 terminations,This D latch belongs to the family of 74LVC2G74. Power is provided by a 1.8V supply. This JK flip flop has a 4pFfarad input capacitance. The electronic device belongs to the LVC/LCX/Zfamily. There is an electronic part mounted in the way of Surface Mount. The 8pins are designed into the board. This device has the clock edge trigger type of Positive Edge. There are 1bits in its design. Its superior flexibility is attributed to its use of 1 circuits. As a result, it consumes 100nA of quiescent current without being affected by external factors.

74LVC2G74GM,125 Features


Tape & Reel (TR) package
74LVC series
8 pins
1 Bits

74LVC2G74GM,125 Applications


There are a lot of Nexperia USA Inc. 74LVC2G74GM,125 Flip Flops applications.

  • Synchronous counter
  • Memory
  • Reduced system switching noise
  • Parallel data storage
  • Bounce elimination switch
  • Storage registers
  • Balanced 24 mA output drivers
  • Buffered Clock
  • Guaranteed simultaneous switching noise level
  • Load Control