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74LVC821APW,112

1.65V~3.6V 200MHz D-Type Flip Flop 10μA 74LVC Series 24-TSSOP (0.173, 4.40mm Width)


  • Manufacturer: Rochester Electronics, LLC
  • Origchip NO: 699-74LVC821APW,112
  • Package: 24-TSSOP (0.173, 4.40mm Width)
  • Datasheet: PDF
  • Stock: 796
  • Description: 1.65V~3.6V 200MHz D-Type Flip Flop 10μA 74LVC Series 24-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 24-TSSOP (0.173, 4.40mm Width)
Supplier Device Package 24-TSSOP
Operating Temperature -40°C~125°C TA
Packaging Tube
Series 74LVC
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Type D-Type
Voltage - Supply 1.65V~3.6V
Function Standard
Output Type Tri-State, Non-Inverted
Number of Elements 1
Clock Frequency 200MHz
Current - Quiescent (Iq) 10μA
Current - Output High, Low 24mA 24mA
Number of Bits per Element 10
Max Propagation Delay @ V, Max CL 7.3ns @ 3.3V, 50pF
Trigger Type Positive Edge
Input Capacitance 5pF
RoHS Status ROHS3 Compliant

74LVC821APW,112 Overview


24-TSSOP (0.173, 4.40mm Width)is the way it is packaged. It is contained within the Tubepackage. As configured, the output uses Tri-State, Non-Inverted. There is a trigger configured with Positive Edge. Surface Mountmounts this electrical part. A supply voltage of 1.65V~3.6V is required for operation. It is operating at -40°C~125°C TA. D-Typedescribes this flip flop. This type of FPGA is a part of the 74LVC series. You should not exceed 200MHzin the output frequency of the device. The element count is 1 . It consumes 10μA of quiescent current without being affected by external factors. The input capacitance of this T flip flop is 5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded.

74LVC821APW,112 Features


Tube package
74LVC series

74LVC821APW,112 Applications


There are a lot of Rochester Electronics, LLC 74LVC821APW,112 Flip Flops applications.

  • Divide a clock signal by 2 or 4
  • Parallel data storage
  • Computing
  • Shift registers
  • 2 – Bit synchronous counter
  • Set-reset capability
  • Instrumentation
  • ESD performance
  • Buffer registers
  • Shift Registers