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  • 74LVCH16374ADGG,51

74LVCH16374ADGG,51

1.65V~3.6V 300MHz D-Type Flip Flop DUAL 74LVCH16374 20μA 74LVCH Series 48-TFSOP (0.240, 6.10mm Width)


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74LVCH16374ADGG,51
  • Package: 48-TFSOP (0.240, 6.10mm Width)
  • Datasheet: PDF
  • Stock: 393
  • Description: 1.65V~3.6V 300MHz D-Type Flip Flop DUAL 74LVCH16374 20μA 74LVCH Series 48-TFSOP (0.240, 6.10mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 48-TFSOP (0.240, 6.10mm Width)
Surface Mount YES
Operating Temperature -40°C~125°C TA
Packaging Tube
Series 74LVCH
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 48
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory FF/Latches
Technology CMOS
Voltage - Supply 1.65V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LVCH16374
Function Standard
Qualification Status Not Qualified
Output Type Tri-State, Non-Inverted
Number of Elements 2
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 3.3V
Load Capacitance 50pF
Number of Ports 2
Clock Frequency 300MHz
Family LVC/LCX/Z
Current - Quiescent (Iq) 20μA
Output Characteristics 3-STATE
Current - Output High, Low 24mA 24mA
Output Polarity TRUE
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 5.4ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 7 ns
Trigger Type Positive Edge
Input Capacitance 5pF
Propagation Delay (tpd) 6.4 ns
Max Frequency@Nom-Sup 100000000Hz
Width 6.1mm

74LVCH16374ADGG,51 Overview


It is embeded in 48-TFSOP (0.240, 6.10mm Width) case. Package Tubeembeds it. T flip flop uses Tri-State, Non-Invertedas the output. In the configuration of the trigger, Positive Edgeis used. There is an electronic component mounted in the way of Surface Mount. With a supply voltage of 1.65V~3.6V volts, it operates. Temperature is set to -40°C~125°C TA. A flip flop of this type is classified as a D-Type. JK flip flop belongs to the 74LVCHseries of FPGAs. A frequency of 300MHzshould be the maximum output frequency. D latch consists of 2 elements. T flip flop consumes 20μA quiescent energy. Terminations are 48. The 74LVCH16374family includes it. The power supply voltage is 3.3V. Input capacitance of this device is 5pF farads. In terms of electronic devices, this device belongs to the LVC/LCX/Zfamily of devices. It is part of the FF/Latchesbase part number family. It reaches 3.6Vwhen the supply voltage is maximal (Vsup). There are 3.3V power supplies attached to it. A D flip flop with 2embedded ports is available.

74LVCH16374ADGG,51 Features


Tube package
74LVCH series
3.3V power supplies

74LVCH16374ADGG,51 Applications


There are a lot of Nexperia USA Inc. 74LVCH16374ADGG,51 Flip Flops applications.

  • Synchronous counter
  • Instrumentation
  • Buffer registers
  • Frequency division
  • Individual Asynchronous Resets
  • Test & Measurement
  • Latch
  • Consumer
  • ESD performance
  • Digital electronics systems