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  • 74LVCH32374AEC/G;5

74LVCH32374AEC/G;5

1.65V~3.6V 300MHz D-Type Flip Flop BOTTOM 74LVCH32374 40μA 74LVCH Series 96-LFBGA


  • Manufacturer: NXP USA Inc.
  • Origchip NO: 568-74LVCH32374AEC/G;5
  • Package: 96-LFBGA
  • Datasheet: PDF
  • Stock: 896
  • Description: 1.65V~3.6V 300MHz D-Type Flip Flop BOTTOM 74LVCH32374 40μA 74LVCH Series 96-LFBGA(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 96-LFBGA
Surface Mount YES
Operating Temperature -40°C~125°C TA
Packaging Tray
Series 74LVCH
Part Status Obsolete
Moisture Sensitivity Level (MSL) 2 (1 Year)
Number of Terminations 96
Type D-Type
Subcategory FF/Latches
Packing Method TAPE AND REEL
Technology CMOS
Voltage - Supply 1.65V~3.6V
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 240
Supply Voltage 3.3V
Time@Peak Reflow Temperature-Max (s) 20
Base Part Number 74LVCH32374
JESD-30 Code R-PBGA-B96
Function Standard
Qualification Status Not Qualified
Output Type Tri-State, Non-Inverted
Number of Elements 4
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 3.3V
Supply Voltage-Min (Vsup) 1.2V
Load Capacitance 50pF
Number of Ports 2
Clock Frequency 300MHz
Family LVC/LCX/Z
Current - Quiescent (Iq) 40μA
Output Characteristics 3-STATE
Current - Output High, Low 24mA 24mA
Output Polarity TRUE
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 5.4ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 7 ns
Trigger Type Positive Edge
Input Capacitance 5pF
Max Frequency@Nom-Sup 120000000Hz
Height Seated (Max) 1.5mm
Length 13.5mm
Width 5.5mm
RoHS Status ROHS3 Compliant

74LVCH32374AEC/G;5 Overview


The flip flop is packaged in a case of 96-LFBGA. There is an embedded version in the package Tray. Currently, the output is configured to use Tri-State, Non-Inverted. This trigger uses the value Positive Edge. Surface Mountis in the way of this electric part. A 1.65V~3.6Vsupply voltage is required for it to operate. It is operating at a temperature of -40°C~125°C TA. It belongs to the type D-Typeof flip flops. JK flip flop is a part of the 74LVCHseries of FPGAs. Its output frequency should not exceed 300MHz Hz. D latch consists of 4 elements. As a result, it consumes 40μA quiescent current and is not affected by external forces. It has been determined that there have been 96 terminations. The 74LVCH32374family includes it. An input voltage of 3.3Vpowers the D latch. JK flip flop input capacitance is 5pF farads. Devices in the LVC/LCX/Zfamily are electronic devices. This part is included in FF/Latches. As soon as 3.6Vis reached, Vsup reaches its maximum value. It is imperative that the supply voltage (Vsup) is maintained above 1.2Vin order to ensure normal operation. Considering its reliability, this T flip flop is well suited for TAPE AND REEL. A total of 3.3V power supplies are needed to run it. There are 2 ports embedded in the flip flops.

74LVCH32374AEC/G;5 Features


Tray package
74LVCH series
3.3V power supplies

74LVCH32374AEC/G;5 Applications


There are a lot of NXP USA Inc. 74LVCH32374AEC/G;5 Flip Flops applications.

  • ESCC
  • Data Synchronizers
  • Shift Registers
  • Reduced system switching noise
  • Communications
  • Individual Asynchronous Resets
  • Guaranteed simultaneous switching noise level
  • Functionally equivalent to the MC10/100EL29
  • Computers
  • Consumer