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74LVT16374AEV,151

2.7V~3.6V 150MHz D-Type Flip Flop BOTTOM 74LVT16374 120μA 74LVT Series 56-VFBGA


  • Manufacturer: NXP USA Inc.
  • Origchip NO: 568-74LVT16374AEV,151
  • Package: 56-VFBGA
  • Datasheet: PDF
  • Stock: 444
  • Description: 2.7V~3.6V 150MHz D-Type Flip Flop BOTTOM 74LVT16374 120μA 74LVT Series 56-VFBGA(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 56-VFBGA
Surface Mount YES
Operating Temperature -40°C~85°C TA
Packaging Tray
Series 74LVT
Part Status Active
Moisture Sensitivity Level (MSL) 2 (1 Year)
Number of Terminations 56
Type D-Type
Subcategory FF/Latches
Technology BICMOS
Voltage - Supply 2.7V~3.6V
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 240
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 20
Base Part Number 74LVT16374
JESD-30 Code R-PBGA-B56
Function Standard
Qualification Status Not Qualified
Output Type Tri-State, Non-Inverted
Number of Elements 2
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 3.3V
Load Capacitance 50pF
Number of Ports 2
Clock Frequency 150MHz
Family LVT
Current - Quiescent (Iq) 120μA
Output Characteristics 3-STATE
Current - Output High, Low 32mA 64mA
Output Polarity TRUE
Max I(ol) 0.064 A
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 5ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 5 ns
Trigger Type Positive Edge
Input Capacitance 3pF
Propagation Delay (tpd) 5.6 ns
Max Frequency@Nom-Sup 150000000Hz
Height Seated (Max) 1mm
Length 7mm
Width 4.5mm
RoHS Status ROHS3 Compliant

74LVT16374AEV,151 Overview


56-VFBGAis the packaging method. D flip flop is embedded in the Tray package. There is a Tri-State, Non-Invertedoutput configured with it. The trigger configured with it uses Positive Edge. The electronic part is mounted in the way of Surface Mount. A voltage of 2.7V~3.6Vis required for its operation. A temperature of -40°C~85°C TAis used in the operation. D-Typedescribes this flip flop. JK flip flop is a part of the 74LVTseries of FPGAs. You should not exceed 150MHzin the output frequency of the device. In total, there are 2 elements. This process consumes 120μA quiescents. There are 56 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. This D latch belongs to the family of 74LVT16374. Power is supplied from a voltage of 3.3V volts. The input capacitance of this T flip flop is 3pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. Devices in the LVTfamily are electronic devices. There is a base part number FF/Latchesfor the RS flip flops. The maximal supply voltage (Vsup) reaches 3.6V. A power supply of 3.3Vis required to operate it. The flip flop has 2embedded ports.

74LVT16374AEV,151 Features


Tray package
74LVT series
3.3V power supplies

74LVT16374AEV,151 Applications


There are a lot of NXP USA Inc. 74LVT16374AEV,151 Flip Flops applications.

  • Event Detectors
  • Control circuits
  • Data storage
  • Communications
  • Modulo – n – counter
  • Automotive
  • Load Control
  • Patented noise
  • Buffer registers
  • 2 – Bit synchronous counter