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  • 74LVT16374AEV/G,51

74LVT16374AEV/G,51

2.7V~3.6V 150MHz 8 Bit D-Type Flip Flop BOTTOM 74LVT16374 56 Pins 120μA 74LVT Series 56-VFBGA


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74LVT16374AEV/G,51
  • Package: 56-VFBGA
  • Datasheet: PDF
  • Stock: 654
  • Description: 2.7V~3.6V 150MHz 8 Bit D-Type Flip Flop BOTTOM 74LVT16374 56 Pins 120μA 74LVT Series 56-VFBGA(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 56-VFBGA
Surface Mount YES
Number of Pins 56
Operating Temperature -40°C~85°C TA
Packaging Tray
Series 74LVT
Part Status Obsolete
Moisture Sensitivity Level (MSL) 2 (1 Year)
Number of Terminations 56
Type D-Type
Subcategory FF/Latches
Packing Method TAPE AND REEL
Technology BICMOS
Voltage - Supply 2.7V~3.6V
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LVT16374
Function Standard
Qualification Status Not Qualified
Output Type Tri-State, Non-Inverted
Operating Supply Voltage 3.3V
Number of Elements 2
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 3.6V
Load Capacitance 50pF
Number of Ports 2
Number of Bits 8
Clock Frequency 150MHz
Propagation Delay 3 ns
Family LVT
Current - Quiescent (Iq) 120μA
Output Characteristics 3-STATE
Current - Output High, Low 32mA 64mA
Max I(ol) 0.064 A
Max Propagation Delay @ V, Max CL 5ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 5 ns
Trigger Type Positive Edge
Input Capacitance 3pF
Number of Output Lines 8
Max Frequency@Nom-Sup 150000000Hz
Height Seated (Max) 1mm
Length 7mm
Width 4.5mm
RoHS Status RoHS Compliant

74LVT16374AEV/G,51 Overview


56-VFBGAis the packaging method. Package Trayembeds it. In the configuration, Tri-State, Non-Invertedis used as the output. In the configuration of the trigger, Positive Edgeis used. It is mounted in the way of Surface Mount. A voltage of 2.7V~3.6Vis used as the supply voltage. The operating temperature is -40°C~85°C TA. It belongs to the type D-Typeof flip flops. JK flip flop belongs to the 74LVTseries of FPGAs. A frequency of 150MHzshould not be exceeded by its output. D latch consists of 2 elements. T flip flop consumes 120μA quiescent energy. The number of terminations is 56. JK flip flop belongs to 74LVT16374 family. A voltage of 3.3V is used as the power supply for this D latch. JK flip flop input capacitance is 3pF farads. The electronic device belongs to the LVTfamily. The electronic flip flop is designed with pins 56. This device is part of the FF/Latchesbase part number family. It is designed with 8bits. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. As a result of its reliable performance, this T flip flop is suitable for TAPE AND REEL. A total of 2ports are embedded in the D flip flop. For high efficiency, the supply voltage should be set to 3.3V. There are 8 output lines on it.

74LVT16374AEV/G,51 Features


Tray package
74LVT series
56 pins
8 Bits

74LVT16374AEV/G,51 Applications


There are a lot of Nexperia USA Inc. 74LVT16374AEV/G,51 Flip Flops applications.

  • Consumer
  • Shift registers
  • Control circuits
  • Patented noise
  • Data Synchronizers
  • Single Up Count-Control Line
  • Data storage
  • Memory
  • Frequency Divider circuits
  • Supports Live Insertion