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  • 74LVT16374AEV/G:55

74LVT16374AEV/G:55

2.7V~3.6V 150MHz 16 Bit D-Type Flip Flop BOTTOM 74LVT16374 56 Pins 120μA 74LVT Series 56-VFBGA


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74LVT16374AEV/G:55
  • Package: 56-VFBGA
  • Datasheet: PDF
  • Stock: 753
  • Description: 2.7V~3.6V 150MHz 16 Bit D-Type Flip Flop BOTTOM 74LVT16374 56 Pins 120μA 74LVT Series 56-VFBGA(Kg)

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Details

Tags

Parameters
Contact Plating Copper, Silver, Tin
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 56-VFBGA
Number of Pins 56
Operating Temperature -40°C~85°C TA
Packaging Tray
Series 74LVT
Part Status Obsolete
Moisture Sensitivity Level (MSL) 2 (1 Year)
Number of Terminations 56
Type D-Type
Subcategory FF/Latches
Technology BICMOS
Voltage - Supply 2.7V~3.6V
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LVT16374
Function Standard
Qualification Status Not Qualified
Output Type Tri-State, Non-Inverted
Operating Supply Voltage 3.3V
Number of Elements 2
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 3.6V
Load Capacitance 50pF
Number of Ports 2
Number of Bits 16
Clock Frequency 150MHz
Propagation Delay 3 ns
Quiescent Current 4mA
Turn On Delay Time 6 ns
Family LVT
Current - Quiescent (Iq) 120μA
Output Characteristics 3-STATE
Current - Output High, Low 32mA 64mA
Max I(ol) 0.064 A
Max Propagation Delay @ V, Max CL 5ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 5 ns
Trigger Type Positive Edge
Input Capacitance 3pF
Number of Output Lines 8
Clock Edge Trigger Type Positive Edge
Max Frequency@Nom-Sup 150000000Hz
Height Seated (Max) 1mm
Length 7mm
Width 4.5mm
RoHS Status RoHS Compliant

74LVT16374AEV/G:55 Overview


The flip flop is packaged in 56-VFBGA. A package named Trayincludes it. The output it is configured with uses Tri-State, Non-Inverted. It is configured with the trigger Positive Edge. There is an electronic component mounted in the way of Surface Mount. The JK flip flop operates at 2.7V~3.6Vvolts. In this case, the operating temperature is -40°C~85°C TA. This D latch has the type D-Type. In FPGA terms, D flip flop is a type of 74LVTseries FPGA. There should be no greater frequency than 150MHzon its output. A total of 2 elements are present. As a result, it consumes 120μA quiescent current and is not affected by external forces. It has been determined that there have been 56 terminations. JK flip flop belongs to 74LVT16374 family. A voltage of 3.3V is used to power it. Its input capacitance is 3pF farads. In this case, the D flip flop belongs to the LVTfamily. Electronic part Surface Mountis mounted in the way. 56pins are included in its design. This device has the clock edge trigger type of Positive Edge. This device is part of the FF/Latchesbase part number family. Flip flops designed with 16bits are used in this part. 3.6Vis the maximum supply voltage (Vsup). A total of 2ports are embedded in the D flip flop. For high efficiency, the supply voltage should be set to 3.3V. There are 8 output lines in this JK flip flop. It consumes a total of 4mA quiescent current at any given time.

74LVT16374AEV/G:55 Features


Tray package
74LVT series
56 pins
16 Bits

74LVT16374AEV/G:55 Applications


There are a lot of Nexperia USA Inc. 74LVT16374AEV/G:55 Flip Flops applications.

  • Differential Individual
  • Power down protection
  • Asynchronous counter
  • Storage registers
  • Latch-up performance
  • Supports Live Insertion
  • Digital electronics systems
  • Divide a clock signal by 2 or 4
  • Communications
  • Single Down Count-Control Line