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  • 74LVT534D,112

74LVT534D,112

2.7V~3.6V 150MHz D-Type Flip Flop DUAL 74LVT534 190μA 74LVT Series 20-SOIC (0.295, 7.50mm Width)


  • Manufacturer: NXP USA Inc.
  • Origchip NO: 568-74LVT534D,112
  • Package: 20-SOIC (0.295, 7.50mm Width)
  • Datasheet: PDF
  • Stock: 835
  • Description: 2.7V~3.6V 150MHz D-Type Flip Flop DUAL 74LVT534 190μA 74LVT Series 20-SOIC (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 20-SOIC (0.295, 7.50mm Width)
Surface Mount YES
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 74LVT
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory FF/Latches
Technology BICMOS
Voltage - Supply 2.7V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LVT534
JESD-30 Code R-PDSO-G20
Function Standard
Qualification Status Not Qualified
Output Type Tri-State, Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 3.3V
Supply Voltage-Min (Vsup) 2.7V
Load Capacitance 50pF
Number of Ports 2
Clock Frequency 150MHz
Family LVT
Current - Quiescent (Iq) 190μA
Output Characteristics 3-STATE
Current - Output High, Low 32mA 64mA
Max I(ol) 0.064 A
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 4.9ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 4.9 ns
Trigger Type Positive Edge
Input Capacitance 4pF
Propagation Delay (tpd) 5.4 ns
Height Seated (Max) 2.65mm
Width 7.5mm
RoHS Status ROHS3 Compliant

74LVT534D,112 Overview


The flip flop is packaged in a case of 20-SOIC (0.295, 7.50mm Width). The package Tubecontains it. It is configured with Tri-State, Invertedas an output. This trigger uses the value Positive Edge. Surface Mountis occupied by this electronic component. A voltage of 2.7V~3.6Vis used as the supply voltage. Temperature is set to -40°C~85°C TA. D-Typeis the type of this D latch. The 74LVTseries comprises this type of FPGA. You should not exceed 150MHzin the output frequency of the device. The element count is 1 . There is 190μA quiescent consumption. In 20terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. Members of the 74LVT534family make up this object. An input voltage of 3.3Vpowers the D latch. JK flip flop input capacitance is 4pF farads. It is a member of the LVTfamily of D flip flop. This RS flip flops is a part number FF/Latches. It reaches 3.6Vwhen the supply voltage is maximal (Vsup). If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 2.7V. An electrical current of 3.3V volts is applied to it. The D flip flop is embedded with 2ports.

74LVT534D,112 Features


Tube package
74LVT series
3.3V power supplies

74LVT534D,112 Applications


There are a lot of NXP USA Inc. 74LVT534D,112 Flip Flops applications.

  • Supports Live Insertion
  • Storage registers
  • Power down protection
  • High Performance Logic for test systems
  • Common Clocks
  • Single Up Count-Control Line
  • Data transfer
  • Data Synchronizers
  • ESCC
  • Memory