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74LVT574D,118

2.7V~3.6V 150MHz D-Type Flip Flop DUAL 74LVT574 190μA 74LVT Series 20-SOIC (0.295, 7.50mm Width)


  • Manufacturer: NXP USA Inc.
  • Origchip NO: 568-74LVT574D,118
  • Package: 20-SOIC (0.295, 7.50mm Width)
  • Datasheet: PDF
  • Stock: 273
  • Description: 2.7V~3.6V 150MHz D-Type Flip Flop DUAL 74LVT574 190μA 74LVT Series 20-SOIC (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 20-SOIC (0.295, 7.50mm Width)
Surface Mount YES
Operating Temperature -40°C~85°C TA
Packaging Tape & Reel (TR)
Series 74LVT
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Additional Feature BROADSIDE VERSION OF 374
Subcategory FF/Latches
Packing Method TAPE AND REEL
Technology BICMOS
Voltage - Supply 2.7V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LVT574
JESD-30 Code R-PDSO-G20
Function Standard
Qualification Status Not Qualified
Output Type Tri-State, Non-Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 3.3V
Supply Voltage-Min (Vsup) 2.7V
Load Capacitance 50pF
Number of Ports 2
Clock Frequency 150MHz
Family LVT
Current - Quiescent (Iq) 190μA
Output Characteristics 3-STATE
Current - Output High, Low 32mA 64mA
Output Polarity TRUE
Max I(ol) 0.032 A
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 5.9ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 5.9 ns
Trigger Type Positive Edge
Input Capacitance 4pF
Propagation Delay (tpd) 6.6 ns
Height Seated (Max) 2.65mm
Width 7.5mm
RoHS Status ROHS3 Compliant

74LVT574D,118 Overview


The flip flop is packaged in a case of 20-SOIC (0.295, 7.50mm Width). There is an embedded version in the package Tape & Reel (TR). T flip flop is configured with an output of Tri-State, Non-Inverted. This trigger uses the value Positive Edge. The electronic part is mounted in the way of Surface Mount. With a supply voltage of 2.7V~3.6V volts, it operates. Currently, the operating temperature is -40°C~85°C TA. This logic flip flop is classified as type D-Type. JK flip flop is a part of the 74LVTseries of FPGAs. A frequency of 150MHzshould be the maximum output frequency. There are 1 elements in it. It consumes 190μA of quiescent current without being affected by external factors. A total of 20 terminations have been made. The object belongs to the 74LVT574 family. The power supply voltage is 3.3V. The input capacitance of this T flip flop is 4pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. It is a member of the LVTfamily of D flip flop. This part is included in FF/Latches. It reaches 3.6Vwhen the maximum supply voltage (Vsup) is applied. For normal operation, the supply voltage (Vsup) should be above 2.7V. A reliable performance of this D flip flop makes it well suited for use in TAPE AND REEL. The power supply is 3.3V. The D flip flop has no ports embedded. Additionally, there are BROADSIDE VERSION OF 374 on the electronic flip flop that can be referred to.

74LVT574D,118 Features


Tape & Reel (TR) package
74LVT series
3.3V power supplies

74LVT574D,118 Applications


There are a lot of NXP USA Inc. 74LVT574D,118 Flip Flops applications.

  • Computing
  • Load Control
  • Bus hold
  • Safety Clamp
  • Latch
  • Divide a clock signal by 2 or 4
  • Bounce elimination switch
  • Storage Registers
  • Balanced Propagation Delays
  • Frequency Dividers