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  • 74LVTH574D,112

74LVTH574D,112

2.7V~3.6V 150MHz D-Type Flip Flop DUAL 74LVTH574 190μA 74LVTH Series 20-SOIC (0.295, 7.50mm Width)


  • Manufacturer: NXP USA Inc.
  • Origchip NO: 568-74LVTH574D,112
  • Package: 20-SOIC (0.295, 7.50mm Width)
  • Datasheet: PDF
  • Stock: 872
  • Description: 2.7V~3.6V 150MHz D-Type Flip Flop DUAL 74LVTH574 190μA 74LVTH Series 20-SOIC (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 20-SOIC (0.295, 7.50mm Width)
Surface Mount YES
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 74LVTH
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory FF/Latches
Technology BICMOS
Voltage - Supply 2.7V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3V
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LVTH574
JESD-30 Code R-PDSO-G20
Function Standard
Qualification Status Not Qualified
Output Type Tri-State, Non-Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 3.3V
Supply Voltage-Min (Vsup) 2.7V
Load Capacitance 50pF
Number of Ports 2
Clock Frequency 150MHz
Family LVT
Current - Quiescent (Iq) 190μA
Output Characteristics 3-STATE
Current - Output High, Low 32mA 64mA
Output Polarity TRUE
Max I(ol) 0.064 A
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 5.9ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 5.9 ns
Trigger Type Positive Edge
Input Capacitance 4pF
Propagation Delay (tpd) 6.6 ns
Height Seated (Max) 2.65mm
Width 7.5mm
RoHS Status ROHS3 Compliant

74LVTH574D,112 Overview


The package is in the form of 20-SOIC (0.295, 7.50mm Width). The package Tubecontains it. T flip flop uses Tri-State, Non-Invertedas its output configuration. It is configured with a trigger that uses a value of Positive Edge. Surface Mountis positioned in the way of this electronic part. A voltage of 2.7V~3.6Vis required for its operation. -40°C~85°C TAis the operating temperature. It belongs to the type D-Typeof flip flops. The 74LVTHseries comprises this type of FPGA. Its output frequency should not exceed 150MHz. D latch consists of 1 elements. There is 190μA quiescent consumption. There have been 20 terminations. This D latch belongs to the family of 74LVTH574. A voltage of 3V provides power to the D latch. Its input capacitance is 4pFfarads. It is a member of the LVTfamily of D flip flop. This device has the base part number FF/Latches. It reaches 3.6Vwhen the supply voltage is maximal (Vsup). Keeping the supply voltage (Vsup) above 2.7V is necessary for normal operation. A total of 3.3V power supplies are needed to run it. There are 2 ports embedded in the flip flops.

74LVTH574D,112 Features


Tube package
74LVTH series
3.3V power supplies

74LVTH574D,112 Applications


There are a lot of NXP USA Inc. 74LVTH574D,112 Flip Flops applications.

  • Asynchronous counter
  • Bounce elimination switch
  • Control circuits
  • Storage Registers
  • Frequency division
  • Computers
  • Cold spare funcion
  • Set-reset capability
  • QML qualified product
  • EMI reduction circuitry