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  • 74LVTH574SJX

74LVTH574SJX

2.7V~3.6V 150MHz D-Type Flip Flop DUAL 74LVTH574 190μA 74LVTH Series 20-SOIC (0.209, 5.30mm Width)


  • Manufacturer: ON Semiconductor
  • Origchip NO: 598-74LVTH574SJX
  • Package: 20-SOIC (0.209, 5.30mm Width)
  • Datasheet: PDF
  • Stock: 188
  • Description: 2.7V~3.6V 150MHz D-Type Flip Flop DUAL 74LVTH574 190μA 74LVTH Series 20-SOIC (0.209, 5.30mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 20-SOIC (0.209, 5.30mm Width)
Surface Mount YES
Operating Temperature -40°C~85°C TA
Packaging Tape & Reel (TR)
Series 74LVTH
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Type D-Type
Technology BICMOS
Voltage - Supply 2.7V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Supply Voltage 3.3V
Reach Compliance Code compliant
Base Part Number 74LVTH574
JESD-30 Code R-PDSO-G20
Function Standard
Output Type Tri-State, Non-Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 3.6V
Supply Voltage-Min (Vsup) 2.7V
Number of Ports 2
Clock Frequency 150MHz
Family LVT
Current - Quiescent (Iq) 190μA
Output Characteristics 3-STATE
Current - Output High, Low 32mA 64mA
Output Polarity TRUE
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 4.6ns @ 3.3V, 50pF
Trigger Type Positive Edge
Input Capacitance 4pF
Propagation Delay (tpd) 5.3 ns
Width 5.3mm

74LVTH574SJX Overview


As a result, it is packaged as 20-SOIC (0.209, 5.30mm Width). It is contained within the Tape & Reel (TR)package. T flip flop uses Tri-State, Non-Invertedas its output configuration. The trigger it is configured with uses Positive Edge. Surface Mountmounts this electrical part. The JK flip flop operates at a voltage of 2.7V~3.6V. The operating temperature is -40°C~85°C TA. This D latch has the type D-Type. JK flip flop belongs to the 74LVTHseries of FPGAs. There should be no greater frequency than 150MHzon its output. A total of 1elements are contained within it. As a result, it consumes 190μA of quiescent current without being affected by external factors. The number of terminations is 20. The 74LVTH574family includes it. The D flip flop is powered by a voltage of 3.3V . The input capacitance of this T flip flop is 4pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. It belongs to the family of electronic devices known as LVT. Vsup reaches its maximum value at 3.6V. The supply voltage (Vsup) should be maintained above 2.7V for normal operation. The D flip flop has no ports embedded.

74LVTH574SJX Features


Tape & Reel (TR) package
74LVTH series

74LVTH574SJX Applications


There are a lot of ON Semiconductor 74LVTH574SJX Flip Flops applications.

  • Memory
  • Parallel data storage
  • Cold spare funcion
  • Test & Measurement
  • Consumer
  • Data storage
  • Load Control
  • Registers
  • Individual Asynchronous Resets
  • Single Down Count-Control Line