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  • 74VHCV574FT

74VHCV574FT

1.8V~5.5V 135MHz D-Type Flip Flop DUAL 2μA 74VHC Series 20-TSSOP (0.173, 4.40mm Width)


  • Manufacturer: Toshiba Semiconductor and Storage
  • Origchip NO: 830-74VHCV574FT
  • Package: 20-TSSOP (0.173, 4.40mm Width)
  • Datasheet: PDF
  • Stock: 389
  • Description: 1.8V~5.5V 135MHz D-Type Flip Flop DUAL 2μA 74VHC Series 20-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 12 Weeks
Mounting Type Surface Mount
Package / Case 20-TSSOP (0.173, 4.40mm Width)
Surface Mount YES
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Series 74VHC
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Type D-Type
Technology CMOS
Voltage - Supply 1.8V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) NOT SPECIFIED
Supply Voltage 5V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
JESD-30 Code R-PDSO-G20
Function Standard
Output Type Tri-State, Non-Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 5.5V
Number of Ports 2
Clock Frequency 135MHz
Family AHC/VHC/H/U/V
Current - Quiescent (Iq) 2μA
Output Characteristics 3-STATE
Current - Output High, Low 16mA 16mA
Output Polarity TRUE
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 10.6ns @ 5V, 50pF
Trigger Type Positive Edge
Input Capacitance 4pF
Propagation Delay (tpd) 23 ns
Length 6.5mm
Width 4.4mm
RoHS Status RoHS Compliant

74VHCV574FT Overview


20-TSSOP (0.173, 4.40mm Width)is the packaging method. D flip flop is embedded in the Tape & Reel (TR) package. This output is configured with Tri-State, Non-Inverted. In the configuration of the trigger, Positive Edgeis used. There is an electric part mounted in the way of Surface Mount. The supply voltage is set to 1.8V~5.5V. It is operating at a temperature of -40°C~125°C TA. Logic flip flops of this type are classified as D-Type. FPGAs belonging to the 74VHCseries contain this type of chip. You should not exceed 135MHzin the output frequency of the device. In total, it contains 1 elements. T flip flop consumes 2μA quiescent energy. There are 20 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. The power source is powered by 5V. Its input capacitance is 4pFfarads. This D flip flop belongs to the family of AHC/VHC/H/U/V. The maximal supply voltage (Vsup) reaches 5.5V. A total of 2ports are embedded in the D flip flop.

74VHCV574FT Features


Tape & Reel (TR) package
74VHC series

74VHCV574FT Applications


There are a lot of Toshiba Semiconductor and Storage 74VHCV574FT Flip Flops applications.

  • Storage Registers
  • Data Synchronizers
  • EMI reduction circuitry
  • Individual Asynchronous Resets
  • Pattern generators
  • Patented noise
  • Safety Clamp
  • Supports Live Insertion
  • Communications
  • Reduced system switching noise