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A2F500M3G-CS288I

288 Terminations-40°C~100°C TJ A2F500M3G System On ChipSmartFusion? Series MCU - 31, FPGA - 78 I/O1.5V


  • Manufacturer: Microsemi Corporation
  • Origchip NO: 523-A2F500M3G-CS288I
  • Package: 288-TFBGA, CSPBGA
  • Datasheet: PDF
  • Stock: 576
  • Description: 288 Terminations-40°C~100°C TJ A2F500M3G System On ChipSmartFusion? Series MCU - 31, FPGA - 78 I/O1.5V (Kg)

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Details

Tags

Parameters
Factory Lead Time 12 Weeks
Package / Case 288-TFBGA, CSPBGA
Surface Mount YES
Operating Temperature -40°C~100°C TJ
Packaging Tray
Published 2003
Series SmartFusion®
JESD-609 Code e0
Part Status Active
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 288
Terminal Finish Tin/Lead/Silver (Sn/Pb/Ag)
HTS Code 8542.39.00.01
Subcategory Field Programmable Gate Arrays
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 235
Supply Voltage 1.5V
Terminal Pitch 0.5mm
Frequency 80MHz
Time@Peak Reflow Temperature-Max (s) 20
Base Part Number A2F500M3G
JESD-30 Code S-PBGA-B288
Number of Outputs 78
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 1.575V
Power Supplies 1.51.82.53.3V
Supply Voltage-Min (Vsup) 1.425V
Interface EBI/EMI, Ethernet, I2C, SPI, UART, USART
Number of I/O MCU - 31, FPGA - 78
RAM Size 64KB
Core Processor ARM® Cortex®-M3
Peripherals DMA, POR, WDT
Connectivity EBI/EMI, Ethernet, I2C, SPI, UART/USART
Architecture MCU, FPGA
Number of Inputs 78
Organization 11520 CLBS, 500000 GATES
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Core Architecture ARM
Primary Attributes ProASIC®3 FPGA, 500K Gates, 11520 D-Flip-Flops
Number of Equivalent Gates 500000
Flash Size 512KB
Height Seated (Max) 1.05mm
Length 11mm
Width 11mm
RoHS Status Non-RoHS Compliant

This SoC is built on ARM? Cortex?-M3 core processor(s).


A core processor ARM? Cortex?-M3 is used to build this SoC.Package 288-TFBGA, CSPBGA is assigned to this system on a chip by the manufacturer.With 64KB RAM implemented, this SoC chip provides reliable operation.The SoC design uses MCU, FPGA architecture for its internal architecture.It is a member of the SmartFusion? series.As a rule of thumb, the average operating temperature for this SoC meaning should be -40°C~100°C TJ.This SoC security combines ProASIC?3 FPGA, 500K Gates, 11520 D-Flip-Flops, an important feature to keep in mind.This SoC system on a chip has been designed in a state-of-the-art Tray package.This SoC part contains a total of MCU - 31, FPGA - 78 I/Os in total.For safe operation, it is advisable to utilize a power supply with 1.5V voltage.The SoCs wireless cannot operate at a voltage greater than 1.575V because it is considered unsafe for the application.There is a possibility that it can be powered by a power supply of at least 1.425V.You can reconfigure FIELD PROGRAMMABLE GATE ARRAY to meet your specific design needs.system on a chip benefits from 288 terminations.As any high-quality Field Programmable Gate Arrays, it is a system on a chip of outstanding capabilities.The SoC chip that comes with this module can be configured to have 78 outputs.In order to operate system on chip, you will need 1.51.82.53.3V power supplies.The SoC chip is equipped with 78 inputs.As for its flash size, it is 512KB.Search A2F500M3G for system on chips with similar specs and purposes.wireless SoCs operate at 80MHz.Core architecture of ARM underpins the SoC meaning.

ARM? Cortex?-M3 processor.


64KB RAM.
Built on MCU, FPGA.
512KB extended flash.
Core Architecture: ARM

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