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CD74HC173MT

2V~6V 60MHz D-Type Flip Flop DUAL 8μA 74HC Series 16-SOIC (0.154, 3.90mm Width)

Manufacturer: Rochester Electronics, LLC
Origchip NO: 699-CD74HC173MT
Package: 16-SOIC (0.154, 3.90mm Width)
Datasheet: PDF
Stock: 270
Description: 2V~6V 60MHz D-Type Flip Flop DUAL 8μA 74HC Series 16-SOIC (0.154, 3.90mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type	Surface Mount
Package / Case	16-SOIC (0.154, 3.90mm Width)
Surface Mount	YES
Operating Temperature	-55°C~125°C TA
Packaging	Tape & Reel (TR)
Series	74HC
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	16
Type	D-Type
Additional Feature	WITH DUAL OUTPUT ENABLE
Technology	CMOS
Voltage - Supply	2V~6V
Terminal Position	DUAL
Terminal Form	GULL WING
Supply Voltage	4.5V
Function	Master Reset
Output Type	Tri-State, Non-Inverted
Number of Elements	1
Supply Voltage-Max (Vsup)	6V
Supply Voltage-Min (Vsup)	2V
Clock Frequency	60MHz
Family	HC/UH
Current - Quiescent (Iq)	8μA
Output Characteristics	3-STATE
Current - Output High, Low	7.8mA 7.8mA
Output Polarity	TRUE
Number of Bits per Element	4
Max Propagation Delay @ V, Max CL	34ns @ 6V, 50pF
Trigger Type	Positive Edge
Input Capacitance	10pF
Propagation Delay (tpd)	300 ns
Length	9.9mm
Width	3.9mm
RoHS Status	ROHS3 Compliant

CD74HC173MT Overview

As a result, it is packaged as 16-SOIC (0.154, 3.90mm Width). A package named Tape & Reel (TR)includes it. Tri-State, Non-Invertedis the output configured for it. There is a trigger configured with Positive Edge. There is an electric part mounted in the way of Surface Mount. A voltage of 2V~6Vis used as the supply voltage. It is operating at a temperature of -55°C~125°C TA. It belongs to the type D-Typeof flip flops. JK flip flop belongs to the 74HCseries of FPGAs. Its output frequency should not exceed 60MHz. There are 1 elements in it. It consumes 8μA of quiescent It has been determined that there have been 16 terminations. A voltage of 4.5V is used to power it. A JK flip flop with a 10pFfarad input capacitance is used here. HC/UHis the family of this D flip flop. As soon as 6Vis reached, Vsup reaches its maximum value. The supply voltage (Vsup) should be kept above 2V for normal operation. Additionally, you may refer to the D latch's additional WITH DUAL OUTPUT ENABLE.

CD74HC173MT Features

Tape & Reel (TR) package
74HC series

CD74HC173MT Applications

There are a lot of Rochester Electronics, LLC CD74HC173MT Flip Flops applications.

Bus hold
Dynamic threshold performance
Power down protection
Asynchronous counter
Count Modes
ESD protection
Cold spare funcion
Differential Individual
ESCC
CMOS Process