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  • CD74HC173MT

CD74HC173MT

2V~6V 60MHz 4 Bit D-Type Flip Flop DUAL 74HC173 16 Pins 8μA 74HC Series 16-SOIC (0.154, 3.90mm Width)


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-CD74HC173MT
  • Package: 16-SOIC (0.154, 3.90mm Width)
  • Datasheet: -
  • Stock: 399
  • Description: 2V~6V 60MHz 4 Bit D-Type Flip Flop DUAL 74HC173 16 Pins 8μA 74HC Series 16-SOIC (0.154, 3.90mm Width)(Kg)

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Details

Tags

Parameters
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 16-SOIC (0.154, 3.90mm Width)
Number of Pins 16
Weight 141.690917mg
Operating Temperature -55°C~125°C TA
Packaging Tape & Reel (TR)
Series 74HC
JESD-609 Code e4
Pbfree Code yes
Part Status Discontinued
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 16
Termination SMD/SMT
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Additional Feature WITH DUAL OUTPUT ENABLE
Subcategory FF/Latches
Packing Method TAPE AND REEL
Technology CMOS
Voltage - Supply 2V~6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 4.5V
Base Part Number 74HC173
Function Master Reset
Output Type Tri-State, Non-Inverted
Number of Elements 1
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 6V
Supply Voltage-Min (Vsup) 2V
Number of Circuits 4
Load Capacitance 50pF
Output Current 7.8mA
Number of Bits 4
Clock Frequency 60MHz
Propagation Delay 200 ns
Turn On Delay Time 17 ns
Family HC/UH
Logic Function D-Type, Flip-Flop
Current - Quiescent (Iq) 8μA
Current - Output High, Low 7.8mA 7.8mA
Max I(ol) 0.006 A
Max Propagation Delay @ V, Max CL 34ns @ 6V, 50pF
Trigger Type Positive Edge
Input Capacitance 10pF
Number of Input Lines 2
Number of Output Lines 3
Clock Edge Trigger Type Positive Edge
Length 9.9mm
Radiation Hardening No
REACH SVHC No SVHC
RoHS Status ROHS3 Compliant
Lead Free Contains Lead

CD74HC173MT Overview


16-SOIC (0.154, 3.90mm Width)is the packaging method. It is contained within the Tape & Reel (TR)package. This output is configured with Tri-State, Non-Inverted. It is configured with the trigger Positive Edge. This electronic part is mounted in the way of Surface Mount. Powered by a 2V~6Vvolt supply, it operates as follows. A temperature of -55°C~125°C TAis used in the operation. It is an electronic flip flop with the type D-Type. JK flip flop is a part of the 74HCseries of FPGAs. You should not exceed 60MHzin its output frequency. In total, there are 1 elements. As a result, it consumes 8μA of quiescent current without being affected by external factors. A total of 16terminations have been recorded. The object belongs to the 74HC173 family. It is powered by a voltage of 4.5V . This JK flip flop has a 10pFfarad input capacitance. Electronic devices of this type belong to the HC/UHfamily. It is mounted by the way of Surface Mount. A total of 16pins are provided on this board. The clock edge trigger type for this device is Positive Edge. The part is included in FF/Latches. 4bits are used in its design. Vsup reaches 6V, the maximal supply voltage. For normal operation, the supply voltage (Vsup) should be above 2V. The superior flexibility is achieved through the use of 4 circuits. In view of its reliability, this D flip flop is a good fit for TAPE AND REEL. With a current output of 7.8mA , it offers maximum design flexibility. There are 3 output Lines, which generate the binary equivalent of the input line whose value is equal to “1” and are available to encode either a decimal or hexadecimal input pattern to typically a binary or “B. C. D” (binary coded decimal) output code. A total of 2input lines have been provided. Additionally, there are WITH DUAL OUTPUT ENABLE on the electronic flip flop that can be referred to.

CD74HC173MT Features


Tape & Reel (TR) package
74HC series
16 pins
4 Bits

CD74HC173MT Applications


There are a lot of Texas Instruments CD74HC173MT Flip Flops applications.

  • Shift registers
  • Storage registers
  • Counters
  • Divide a clock signal by 2 or 4
  • Load Control
  • Matched Rise and Fall
  • Common Clocks
  • Differential Individual
  • Instrumentation
  • Set-reset capability