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CD74HCT273EG4

4.5V~5.5V 50MHz D-Type Flip Flop 74HCT273 8μA 74HCT Series 20-DIP (0.300, 7.62mm)


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-CD74HCT273EG4
  • Package: 20-DIP (0.300, 7.62mm)
  • Datasheet: -
  • Stock: 377
  • Description: 4.5V~5.5V 50MHz D-Type Flip Flop 74HCT273 8μA 74HCT Series 20-DIP (0.300, 7.62mm)(Kg)

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Details

Tags

Parameters
Factory Lead Time 6 Weeks
Mounting Type Through Hole
Package / Case 20-DIP (0.300, 7.62mm)
Supplier Device Package 20-PDIP
Operating Temperature -55°C~125°C TA
Packaging Tube
Series 74HCT
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Type D-Type
Voltage - Supply 4.5V~5.5V
Base Part Number 74HCT273
Function Master Reset
Output Type Non-Inverted
Number of Elements 1
Clock Frequency 50MHz
Current - Quiescent (Iq) 8μA
Current - Output High, Low 4mA 4mA
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 30ns @ 4.5V, 50pF
Trigger Type Positive Edge
Input Capacitance 10pF
RoHS Status ROHS3 Compliant

CD74HCT273EG4 Overview


It is embeded in 20-DIP (0.300, 7.62mm) case. It is included in the package Tube. T flip flop is configured with an output of Non-Inverted. This trigger uses the value Positive Edge. There is an electric part mounted in the way of Through Hole. The JK flip flop operates with an input voltage of 4.5V~5.5V volts. It is operating at -55°C~125°C TA. There is D-Type type of electronic flip flop associated with this device. This type of FPGA is a part of the 74HCT series. A frequency of 50MHzshould not be exceeded by its output. A total of 1elements are contained within it. As a result, it consumes 8μA of quiescent current without being affected by external factors. The 74HCT273 family contains it. This T flip flop has a capacitance of 10pF farads at the input.

CD74HCT273EG4 Features


Tube package
74HCT series

CD74HCT273EG4 Applications


There are a lot of Texas Instruments CD74HCT273EG4 Flip Flops applications.

  • Divide a clock signal by 2 or 4
  • Synchronous counter
  • Memory
  • Single Up Count-Control Line
  • Dynamic threshold performance
  • Data Synchronizers
  • Guaranteed simultaneous switching noise level
  • Computers
  • Data storage
  • Differential Individual