All Products

CY39100V676B-200MBC

1.5/3.32.5/3.3V 1mm PMIC 676 Pin 2.5V FBGA


  • Manufacturer: Cypress Semiconductor
  • Origchip NO: 217-CY39100V676B-200MBC
  • Package: FBGA
  • Datasheet: -
  • Stock: 377
  • Description: 1.5/3.32.5/3.3V 1mm PMIC 676 Pin 2.5V FBGA (Kg)

Purchase & Inquiry

Transport

Purchase

You may place an order without registering to Utmel.
We strongly suggest you sign in before purchasing as you can track your order in real time.

Means of Payment

For your convenience, we accept multiple payment methods in USD, including PayPal, Credit Card, and wire transfer.

RFQ (Request for Quotations)

It is recommended to request for quotations to get the latest prices and inventories about the part.
Our sales will reply to your request by email within 24 hours.

IMPORTANT NOTICE

1. You'll receive an order information email in your inbox. (Please remember to check the spam folder if you didn't hear from us).
2. Since inventories and prices may fluctuate to some extent, the sales manager is going to reconfirm the order and let you know if there are any updates.

Shipping Cost

Shipping starts at $40, but some countries will exceed $40. For example (South Africa, Brazil, India, Pakistan, Israel, etc.)
The basic freight (for package ≤0.5kg or corresponding volume) depends on the time zone and country.

Shipping Method

Currently, our products are shipped through DHL, FedEx, SF, and UPS.

Delivery Time

Once the goods are shipped, estimated delivery time depends on the shipping methods you chose:

FedEx International, 5-7 business days.

The following are some common countries' logistic time.
transport

Details

Tags

Parameters
Package / Case FBGA
Surface Mount YES
Number of Pins 676
JESD-609 Code e0
Moisture Sensitivity Level (MSL) 3
Number of Terminations 676
Terminal Finish TIN LEAD
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature ALSO OPERATES WITH 3.3V SUPPLY VOLTAGE
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 225
Supply Voltage 2.5V
Terminal Pitch 1mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 676
Supply Voltage-Max (Vsup) 2.7V
Power Supplies 1.5/3.32.5/3.3V
Temperature Grade COMMERCIAL
Supply Voltage-Min (Vsup) 2.3V
Number of I/O 302
RAM Size 30kB
Memory Type SRAM
Propagation Delay 7.5 ns
Turn On Delay Time 7.5 ns
Frequency (Max) 200MHz
Organization 0 DEDICATED INPUTS, 302 I/O
Programmable Logic Type LOADABLE PLD
Speed Grade 200
Output Function MACROCELL
Number of Macro Cells 1536
JTAG BST YES
In-System Programmable YES
Height Seated (Max) 1.6mm
Length 27mm
Width 27mm
Radiation Hardening No
RoHS Status RoHS Compliant

CY39100V676B-200MBC Overview


1536 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.The item is packaged with FBGA.As you can see, this device has 302 I/O ports programmed into it.Terminations of devices are set to [0].As the terminal position of this electrical part is [0], it serves as an important access point for passengers or freight.An electrical supply voltage of 2.5V is used to power it.There is a part included in Programmable Logic Devices.In this chip, the 676pins are programmed.When using this device, ALSO OPERATES WITH 3.3V SUPPLY VOLTAGEis also available.SRAM is adopted for storing data.There are 676 pins on the device.In order for the device to operate, it requires 1.5/3.32.5/3.3V power supplies.In this case, the maximum supply voltage (Vsup) reaches 2.7V.It is recommended that the operating temperature be greater than 0°C.The operating temperature should be lower than 70°C.It should be possible for Vsup to exceed 2.3Vat the supply voltage.There should be a lower maximum frequency than 200MHz.Programmable logic types can be divided into LOADABLE PLD.

CY39100V676B-200MBC Features


FBGA package
302 I/Os
676 pin count
676 pins
1.5/3.32.5/3.3V power supplies

CY39100V676B-200MBC Applications


There are a lot of Cypress Semiconductor CY39100V676B-200MBC CPLDs applications.

  • I/O expansion
  • Field programmable gate
  • Complex programmable logic devices
  • Synchronous or asynchronous mode
  • Digital designs
  • Address decoding
  • Address decoders
  • SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
  • STANDARD SERIAL INTERFACE UART
  • Power Meter SMPS