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CY74FCT821ATSOC

4.75V~5.25V 10 Bit D-Type Flip Flop DUAL 74FCT821 24 Pins 200μA 74FCT Series 24-SOIC (0.295, 7.50mm Width)


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-CY74FCT821ATSOC
  • Package: 24-SOIC (0.295, 7.50mm Width)
  • Datasheet: PDF
  • Stock: 522
  • Description: 4.75V~5.25V 10 Bit D-Type Flip Flop DUAL 74FCT821 24 Pins 200μA 74FCT Series 24-SOIC (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Subcategory FF/Latches
Technology CMOS
Voltage - Supply 4.75V~5.25V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 5V
Base Part Number 74FCT821
Function Standard
Output Type Tri-State, Non-Inverted
Operating Supply Voltage 5V
Number of Elements 1
Polarity Non-Inverting
Power Supplies 5V
Load Capacitance 50pF
Number of Ports 2
Output Current 64mA
Number of Bits 10
Propagation Delay 20 ns
Turn On Delay Time 6 ns
Family FCT
Logic Function D-Type, Flip-Flop
Current - Quiescent (Iq) 200μA
Output Characteristics 3-STATE
Current - Output High, Low 32mA 64mA
Max I(ol) 0.064 A
Max Propagation Delay @ V, Max CL 20ns @ 300pF
Trigger Type Positive Edge
Input Capacitance 5pF
Power Supply Current-Max (ICC) 0.2mA
Number of Input Lines 10
Count Direction UNIDIRECTIONAL
Clock Edge Trigger Type Positive Edge
Translation N/A
Height 2.65mm
Length 15.4mm
Width 7.5mm
Thickness 2.35mm
Radiation Hardening No
REACH SVHC No SVHC
RoHS Status ROHS3 Compliant
Lead Free Lead Free
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 2 days ago)
Contact Plating Gold
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 24-SOIC (0.295, 7.50mm Width)
Number of Pins 24
Weight 624.398247mg
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 74FCT
JESD-609 Code e4
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 24
ECCN Code EAR99
Type D-Type

CY74FCT821ATSOC Overview


24-SOIC (0.295, 7.50mm Width)is the packaging method. A package named Tubeincludes it. T flip flop is configured with an output of Tri-State, Non-Inverted. This trigger is configured to use Positive Edge. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 4.75V~5.25V. In the operating environment, the temperature is -40°C~85°C TA. D-Typeis the type of this D latch. It belongs to the 74FCTseries of FPGAs. The list contains 1 elements. During its operation, it consumes 200μA quiescent energy. 24terminations have occurred. It is a member of the 74FCT821 family. A voltage of 5V provides power to the D latch. A JK flip flop with a 5pFfarad input capacitance is used here. Devices in the FCTfamily are electronic devices. Surface Mount mounts this electronic component. It is designed with 24 pins. A Positive Edgeclock edge trigger is used in this device. It is part of the FF/Latchesbase part number family. It is designed with a number of bits of 10. The system runs on a power supply of 5V watts. The D flip flop is embedded with 2ports. The supply voltage should be maintained at 5V for high efficiency. With a current output of 64mA , it offers maximum design flexibility. As of now, there are 10input lines.

CY74FCT821ATSOC Features


Tube package
74FCT series
24 pins
10 Bits
5V power supplies

CY74FCT821ATSOC Applications


There are a lot of Texas Instruments CY74FCT821ATSOC Flip Flops applications.

  • Count Modes
  • QML qualified product
  • Safety Clamp
  • Shift registers
  • Modulo – n – counter
  • Individual Asynchronous Resets
  • Buffer registers
  • High Performance Logic for test systems
  • Data Synchronizers
  • ESD protection