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EPM3064ATC100-7N

0.5mm PMIC 100 Pin 166.67MHz 3.3V TQFP


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM3064ATC100-7N
  • Package: TQFP
  • Datasheet: PDF
  • Stock: 494
  • Description: 0.5mm PMIC 100 Pin 166.67MHz 3.3V TQFP (Kg)

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Details

Tags

Parameters
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 3
Number of Terminations 100
Termination SMD/SMT
ECCN Code EAR99
Terminal Finish Matte Tin (Sn) - annealed
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature YES
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.5mm
Frequency 166.67MHz
Time@Peak Reflow Temperature-Max (s) 40
Pin Count 100
Operating Supply Voltage 3.3V
Temperature Grade COMMERCIAL
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Number of I/O 66
Memory Type EEPROM
Propagation Delay 7.5 ns
Turn On Delay Time 7.5 ns
Frequency (Max) 222.2MHz
Programmable Logic Type EE PLD
Number of Gates 1250
Number of Programmable I/O 66
Number of Logic Blocks (LABs) 4
Speed Grade 7
Output Function MACROCELL
Number of Macro Cells 64
JTAG BST YES
In-System Programmable YES
Radiation Hardening No
REACH SVHC Unknown
RoHS Status RoHS Compliant
Lead Free Lead Free
Factory Lead Time 10 Weeks
Mount Surface Mount
Package / Case TQFP
Number of Pins 100
Published 1998
JESD-609 Code e3

EPM3064ATC100-7N Overview


There are 64 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.A TQFP package contains the item.It is equipped with 66I/O ports.Devices are programmed with terminations of [0].This electrical part is wired with a terminal position of QUAD.There is 3.3V voltage supply for this device.It is a part of the family [0].In this chip, the 100pins are programmed.When using this device, YEScan also be found.In digital circuits, 1250gates serve as building blocks.A high level of efficiency can be achieved by maintaining the supply voltage at [0].In general, it is recommended to store data in [0].In this case, it is mounted by Surface Mount.It is designed with 100 pins.There is a maximum supply voltage of 3.6Vwhen the device is operating.A minimum supply voltage of 3V is required for it to operate.There are 66 programmable I/Os, which are method of data transmissions, via input/output (I/O), between a central processing unit (CPU) and a peripheral device, such as a network adapter or a Parallel ATA storage device. A frequency of 166.67MHzcan be achieved.It is recommended that the operating temperature be higher than 0°C.It is recommended that the operating temperature be below 70°C.4logic blocks (LABs) make up this circuit.There should be a lower maximum frequency than 222.2MHz.In programmable logic, a type of logic can be categorized as EE PLD.

EPM3064ATC100-7N Features


TQFP package
66 I/Os
100 pin count
100 pins
4 logic blocks (LABs)

EPM3064ATC100-7N Applications


There are a lot of Altera EPM3064ATC100-7N CPLDs applications.

  • Power up sequencing
  • Auxiliary Power Supply Isolated and Non-isolated
  • Power automation
  • Digital systems
  • I/O PORTS (MCU MODULE)
  • Handheld digital devices
  • PULSE WIDTH MODULATION (PWM)
  • Software Configuration of Add-In Boards
  • Custom shift registers
  • I2C BUS INTERFACE