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  • EPM3256ATC144-7

EPM3256ATC144-7

0.5mm PMIC 144 Pin 166.67MHz 3.3V TQFP


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM3256ATC144-7
  • Package: TQFP
  • Datasheet: PDF
  • Stock: 252
  • Description: 0.5mm PMIC 144 Pin 166.67MHz 3.3V TQFP (Kg)

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Details

Tags

Parameters
Pbfree Code no
Part Status Active
Moisture Sensitivity Level (MSL) 3
Number of Terminations 144
Terminal Finish Tin/Lead (Sn/Pb)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature YES
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 220
Supply Voltage 3.3V
Terminal Pitch 0.5mm
Frequency 166.67MHz
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 144
Qualification Status Not Qualified
Operating Supply Voltage 3.3V
Temperature Grade COMMERCIAL
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Number of I/O 116
Memory Type EEPROM
Propagation Delay 7.5 ns
Turn On Delay Time 7.5 ns
Frequency (Max) 126.6MHz
Programmable Logic Type EE PLD
Number of Gates 5000
Number of Programmable I/O 116
Number of Logic Blocks (LABs) 16
Speed Grade 7
Output Function MACROCELL
Number of Macro Cells 256
JTAG BST YES
In-System Programmable YES
Height Seated (Max) 1.6mm
Length 20mm
Width 20mm
RoHS Status RoHS Compliant
Lead Free Contains Lead
Factory Lead Time 10 Weeks
Mount Surface Mount
Package / Case TQFP
Number of Pins 144
Packaging Bulk
Published 1998
JESD-609 Code e0

EPM3256ATC144-7 Overview


The mobile phone network has 256 macro cells, which are cells that provide radio coverage from high-power cell sites (towers, antennas, or masts).TQFPis the package in which it resides.There are 116 I/Os programmed in it.It is programmed that device terminations will be 144 .This electrical component has a terminal position of 0.The power source is powered by 3.3Vvolts.It is a part of the family [0].Bulkis the packaging method.A chip with 144pins is programmed.This device also displays [0].As a building block for digital circuits, there are 5000gates.If high efficiency is desired, the supply voltage should be kept at [0].Data storage is performed using [0].It is mounted by Surface Mount.The device has a pinout of [0].It operates at a maximum supply voltage of 3.6V volts.It operates with the minimal supply voltage of 3V.In total, there are 116programmable I/Os.The frequency that can be achieved is 166.67MHz.The operating temperature should be higher than 0°C.Temperatures should be lower than 70°C when operating.There are 16 logic blocks (LABs) in its basic building block.The maximum frequency should not exceed 126.6MHz.Types of programmable logic are divided into EE PLD.

EPM3256ATC144-7 Features


TQFP package
116 I/Os
144 pin count
144 pins
16 logic blocks (LABs)

EPM3256ATC144-7 Applications


There are a lot of Altera EPM3256ATC144-7 CPLDs applications.

  • Page register
  • STANDARD SERIAL INTERFACE UART
  • PULSE WIDTH MODULATION (PWM)
  • I/O expansion
  • Address decoders
  • Timing control
  • Battery operated portable devices
  • State machine control
  • Storage Cards and Storage Racks
  • Field programmable gate