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EPM5064JC-2

5V 1.27mm PMIC 5V


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM5064JC-2
  • Package: -
  • Datasheet: -
  • Stock: 352
  • Description: 5V 1.27mm PMIC 5V (Kg)

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Details

Tags

Parameters
Surface Mount YES
JESD-609 Code e0
Pbfree Code no
Number of Terminations 44
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn/Pb)
Additional Feature LABS INTERCONNECTED BY PIA; 4 LABS; 64 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 220
Supply Voltage 5V
Terminal Pitch 1.27mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 44
JESD-30 Code S-CQCC-J44
Qualification Status Not Qualified
Operating Temperature (Max) 70°C
Supply Voltage-Max (Vsup) 5.25V
Power Supplies 5V
Temperature Grade COMMERCIAL
Supply Voltage-Min (Vsup) 4.75V
Number of I/O 28
Clock Frequency 50MHz
Propagation Delay 45 ns
Organization 7 DEDICATED INPUTS, 28 I/O
Programmable Logic Type UV PLD
Output Function MACROCELL
Number of Macro Cells 64
JTAG BST NO
Number of Dedicated Inputs 7
In-System Programmable NO
Height Seated (Max) 4.57mm
Length 16.51mm
Width 16.51mm
RoHS Status Non-RoHS Compliant

EPM5064JC-2 Overview


64macrocells exist, which are cells in a mobile phone network that are primarily composed of high-power towers, antennas, or masts.As a result, it has 28 I/O ports programmed.It is programmed that device terminations will be 44 .This electrical component has a terminal position of 0.It is powered from a supply voltage of 5V.This part is in the family [0].It has 44pins programmed.If you use this device, you will also find [0].It operates from 5V power supplies.A maximum supply voltage (Vsup) of 5.25V is provided.A total of 7dedicated inputs are available for detecting the status of input signals.Vsup (supply voltage) must be greater than 4.75V.A frequency of 50MHzshould not be exceeded by its clock.This kind of FPGA is composed of UV PLD.It is recommended that the operating temperature be kept below 70°C.

EPM5064JC-2 Features


28 I/Os
44 pin count
5V power supplies

EPM5064JC-2 Applications


There are a lot of Altera EPM5064JC-2 CPLDs applications.

  • ToR/Aggregation/Core Switch and Router
  • Pattern recognition
  • SUPERVISORY FUNCTION (LVD AND WATCHDOG)
  • Wireless Infrastructure Base Band Unit and Remote Radio Unit
  • DDC INTERFACE
  • Digital systems
  • Protection relays
  • Software-Driven Hardware Configuration
  • I/O PORTS (MCU MODULE)
  • Voltage level translation