English

All Products

View All >>
  • EPM570M100C4N

EPM570M100C4N

1.5/3.32.5/3.3V 0.5mm PMIC MAX? II Series EPM570 2.5V 100-TFBGA


  • Manufacturer: Intel
  • Origchip NO: 386-EPM570M100C4N
  • Package: 100-TFBGA
  • Datasheet: PDF
  • Stock: 520
  • Description: 1.5/3.32.5/3.3V 0.5mm PMIC MAX? II Series EPM570 2.5V 100-TFBGA (Kg)

Purchase & Inquiry

Transport

Purchase

You may place an order without registering to Utmel.
We strongly suggest you sign in before purchasing as you can track your order in real time.

Means of Payment

For your convenience, we accept multiple payment methods in USD, including PayPal, Credit Card, and wire transfer.

RFQ (Request for Quotations)

It is recommended to request for quotations to get the latest prices and inventories about the part.
Our sales will reply to your request by email within 24 hours.

IMPORTANT NOTICE

1. You'll receive an order information email in your inbox. (Please remember to check the spam folder if you didn't hear from us).
2. Since inventories and prices may fluctuate to some extent, the sales manager is going to reconfirm the order and let you know if there are any updates.

Shipping Cost

Shipping starts at $40, but some countries will exceed $40. For example (South Africa, Brazil, India, Pakistan, Israel, etc.)
The basic freight (for package ≤0.5kg or corresponding volume) depends on the time zone and country.

Shipping Method

Currently, our products are shipped through DHL, FedEx, SF, and UPS.

Delivery Time

Once the goods are shipped, estimated delivery time depends on the shipping methods you chose:

FedEx International, 5-7 business days.

The following are some common countries' logistic time.
transport

Details

Tags

Parameters
Factory Lead Time 8 Weeks
Mounting Type Surface Mount
Package / Case 100-TFBGA
Surface Mount YES
Operating Temperature 0°C~85°C TJ
Packaging Tray
Series MAX® II
JESD-609 Code e1
Part Status Active
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 100
ECCN Code EAR99
Terminal Finish TIN SILVER COPPER
Additional Feature IT CAN ALSO OPERATE AT 3.3V
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 260
Supply Voltage 2.5V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) 40
Base Part Number EPM570
JESD-30 Code S-PBGA-B100
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 2.625V
Power Supplies 1.5/3.32.5/3.3V
Supply Voltage-Min (Vsup) 2.375V
Programmable Type In System Programmable
Number of I/O 76
Propagation Delay 7 ns
Output Function MACROCELL
Number of Macro Cells 440
JTAG BST YES
Voltage Supply - Internal 2.5V 3.3V
Delay Time tpd(1) Max 5.4ns
Number of Logic Elements/Blocks 570
RoHS Status RoHS Compliant

EPM570M100C4N Overview


There are 440 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).The item is enclosed in a 100-TFBGA package.As you can see, this device has 76 I/O ports programmed into it.Terminations of devices are set to [0].BOTTOMis the terminal position of this electrical part.The power supply voltage is 2.5V.It is a part of the family [0].As a result, it is packaged as Tray.The operating temperature of the machine is 0°C~85°C TJ to ensure its reliability.It is recommended that the chip be mounted by Surface Mount.As part of the MAX? IIseries, it is a type of FPGA.This device can also display [0].In accordance with the [0], its related parts are listed.A logic element or block has 570elements.There is 1.5/3.32.5/3.3V power supply available for it.2.625Vrepresents the maximal supply voltage (Vsup).A supply voltage (Vsup) of greater than 2.375V should be used.

EPM570M100C4N Features


100-TFBGA package
76 I/Os
The operating temperature of 0°C~85°C TJ
1.5/3.32.5/3.3V power supplies

EPM570M100C4N Applications


There are a lot of Intel EPM570M100C4N CPLDs applications.

  • Address decoding
  • Programmable power management
  • Multiple DIP Switch Replacement
  • Timing control
  • Page register
  • Software Configuration of Add-In Boards
  • ToR/Aggregation/Core Switch and Router
  • INTERRUPT SYSTEM
  • Multiple Clock Source Selection
  • Configurable Addressing of I/O Boards