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EPM7032AELC44-7N

PMIC 44 Pin 166.67MHz 3.3V PLCC


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7032AELC44-7N
  • Package: PLCC
  • Datasheet: PDF
  • Stock: 780
  • Description: PMIC 44 Pin 166.67MHz 3.3V PLCC (Kg)

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Details

Tags

Parameters
Peak Reflow Temperature (Cel) 245
Supply Voltage 3.3V
Reach Compliance Code unknown
Frequency 166.67MHz
Time@Peak Reflow Temperature-Max (s) 40
Pin Count 44
Qualification Status Not Qualified
Operating Supply Voltage 3.3V
Temperature Grade COMMERCIAL
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Number of I/O 36
Memory Type EEPROM
Propagation Delay 7.5 ns
Turn On Delay Time 7.5 ns
Frequency (Max) 227.3MHz
Programmable Logic Type EE PLD
Number of Gates 600
Number of Programmable I/O 36
Number of Logic Blocks (LABs) 2
Speed Grade 7
Output Function MACROCELL
Number of Macro Cells 32
JTAG BST YES
In-System Programmable YES
RoHS Status RoHS Compliant
Lead Free Lead Free
Factory Lead Time 10 Weeks
Mount Surface Mount
Package / Case PLCC
Number of Pins 44
Published 1998
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3
Number of Terminations 44
ECCN Code EAR99
Terminal Finish Matte Tin (Sn) - annealed
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form J BEND

EPM7032AELC44-7N Overview


Currently, there are 32 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.It is part of the PLCC package.It is programmed with 36 I/Os.There is a 44terminations set on devices.The terminal position of this electrical component is QUAD.The power source is powered by 3.3Vvolts.This part is part of the family [0].A chip with 44pins is programmed.For digital circuits, there are 600gates. These devices serve as building blocks.Optimal efficiency requires a supply voltage of [0].It is recommended that data be stored in [0].The electronic component is mounted by Surface Mount.It is designed with 44 pins.There is a maximum supply voltage of 3.6Vwhen the device is operating.With a minimal supply voltage of [0], it operates.There are a total of 36 Programmable I/Os.There can be 166.67MHz frequency achieved.It is recommended that the operating temperature be higher than 0°C.Temperatures should not exceed 70°C.In its simplest form, it consists of 2 logic blocks (LABs).The maximal frequency should be lower than 227.3MHz.This kind of FPGA is composed of EE PLD.

EPM7032AELC44-7N Features


PLCC package
36 I/Os
44 pin count
44 pins
2 logic blocks (LABs)

EPM7032AELC44-7N Applications


There are a lot of Altera EPM7032AELC44-7N CPLDs applications.

  • INTERRUPT SYSTEM
  • I/O PORTS (MCU MODULE)
  • SUPERVISORY FUNCTION (LVD AND WATCHDOG)
  • ANALOG-TO-DIGITAL CONVERTOR (ADC)
  • Parity generators
  • Software-driven hardware configuration
  • Voltage level translation
  • Cross-Matrix Switch
  • Synchronous or asynchronous mode
  • Discrete logic functions