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EPM7064AELC44-7

PMIC 44 Pin 166.67MHz 3.3V PLCC


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7064AELC44-7
  • Package: PLCC
  • Datasheet: PDF
  • Stock: 415
  • Description: PMIC 44 Pin 166.67MHz 3.3V PLCC (Kg)

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Details

Tags

Parameters
Factory Lead Time 10 Weeks
Mount Surface Mount
Package / Case PLCC
Number of Pins 44
Published 1998
JESD-609 Code e0
Pbfree Code no
Moisture Sensitivity Level (MSL) 1
Number of Terminations 44
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn/Pb)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 220
Supply Voltage 3.3V
Frequency 166.67MHz
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 44
Qualification Status Not Qualified
Operating Supply Voltage 3.3V
Temperature Grade COMMERCIAL
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Number of I/O 36
Memory Type EEPROM
Propagation Delay 7.5 ns
Turn On Delay Time 7.5 ns
Frequency (Max) 222.2MHz
Programmable Logic Type EE PLD
Number of Gates 1250
Number of Programmable I/O 36
Number of Logic Blocks (LABs) 4
Speed Grade 7
Output Function MACROCELL
Number of Macro Cells 64
JTAG BST YES
In-System Programmable YES
Length 16.5862mm
Width 16.5862mm
RoHS Status RoHS Compliant

EPM7064AELC44-7 Overview


There are 64 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.There is a PLCC package containing it.The device is programmed with 36 I/Os.Devices are programmed with terminations of [0].This electrical part is wired with a terminal position of QUAD.The device is powered by a voltage of 3.3V volts.This part is in the family [0].The chip is programmed with 44 pins.In digital circuits, 1250gates serve as building blocks.If high efficiency is desired, the supply voltage should be kept at [0].For storing data, it is recommended to use [0].In this case, it is mounted by Surface Mount.44pins are included in its design.This device operates at a voltage of 3.6V when the maximum supply voltage is applied.Despite its minimal supply voltage of [0], it is capable of operating.There are 36 programmable I/Os, which are method of data transmissions, via input/output (I/O), between a central processing unit (CPU) and a peripheral device, such as a network adapter or a Parallel ATA storage device. This frequency can be achieved at 166.67MHz.There should be a temperature above 0°Cat the time of operation.A temperature less than 70°Cshould be used for operation.The logic block consists of 4 l logic blocks (LABs).Maximum frequency should be less than 222.2MHz.It is possible to classify programmable logic as EE PLD.

EPM7064AELC44-7 Features


PLCC package
36 I/Os
44 pin count
44 pins
4 logic blocks (LABs)

EPM7064AELC44-7 Applications


There are a lot of Altera EPM7064AELC44-7 CPLDs applications.

  • Battery operated portable devices
  • Programmable polarity
  • Digital multiplexers
  • Voltage level translation
  • I/O expansion
  • Pattern recognition
  • ToR/Aggregation/Core Switch and Router
  • Configurable Addressing of I/O Boards
  • ROM patching
  • Multiple DIP Switch Replacement