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  • EPM7064AETI100-7

EPM7064AETI100-7

0.5mm PMIC 100 Pin 166.67MHz 3.3V TQFP


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7064AETI100-7
  • Package: TQFP
  • Datasheet: PDF
  • Stock: 499
  • Description: 0.5mm PMIC 100 Pin 166.67MHz 3.3V TQFP (Kg)

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Details

Tags

Parameters
Factory Lead Time 10 Weeks
Mount Surface Mount
Package / Case TQFP
Number of Pins 100
Published 1998
JESD-609 Code e0
Pbfree Code no
Part Status Active
Moisture Sensitivity Level (MSL) 3
Number of Terminations 100
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn/Pb)
Max Operating Temperature 85°C
Min Operating Temperature -40°C
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 235
Supply Voltage 3.3V
Terminal Pitch 0.5mm
Frequency 166.67MHz
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 100
Number of Outputs 68
Operating Supply Voltage 3.3V
Temperature Grade INDUSTRIAL
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Number of I/O 68
Memory Type EEPROM
Propagation Delay 7.5 ns
Turn On Delay Time 7.5 ns
Frequency (Max) 222.2MHz
Architecture PLA-TYPE
Programmable Logic Type EE PLD
Number of Gates 1250
Number of Programmable I/O 68
Number of Logic Blocks (LABs) 4
Speed Grade 7
Output Function MACROCELL
Number of Macro Cells 64
JTAG BST YES
In-System Programmable YES
Height 1mm
Length 14mm
Width 14mm
Radiation Hardening No
RoHS Status RoHS Compliant
Lead Free Contains Lead

EPM7064AETI100-7 Overview


The mobile phone network has 64 macro cells, which are cells that provide radio coverage from high-power cell sites (towers, antennas, or masts).A TQFP package contains the item.The device is programmed with 68 I/O ports.The termination of a device is set to [0].This electrical part has a terminal position of QUADand is connected to the ground.A voltage of 3.3V is used as the power supply for this device.It is a part of family [0].There are 100 pins on the chip.In digital circuits, there are 1250gates, which act as a basic building block.A high level of efficiency can be achieved by maintaining the supply voltage at [0].It is recommended to store data in [0].Surface Mountis used to mount this electronic component.A total of 100pins are provided on this board.A maximum voltage of 3.6Vis required for operation.Initially, it requires a voltage of 3Vas the minimum supply voltage.A programmable I/O count of 68 has been recorded.The frequency that can be achieved is 166.67MHz.It is recommended that the operating temperature exceeds -40°C.It is recommended that the operating temperature be lower than 85°C.There are 4 logic blocks (LABs) in its basic building block.A maximum frequency of less than 222.2MHzis recommended.Programmable logic types can be divided into EE PLD.This device has 68outputs configured.

EPM7064AETI100-7 Features


TQFP package
68 I/Os
100 pin count
100 pins
4 logic blocks (LABs)
68 outputs

EPM7064AETI100-7 Applications


There are a lot of Altera EPM7064AETI100-7 CPLDs applications.

  • Digital multiplexers
  • D/T registers and latches
  • PULSE WIDTH MODULATION (PWM)
  • Page register
  • Custom state machines
  • Boolean function generators
  • Dedicated input registers
  • Network Interface Card (NIC) and Host Bus Adapter (HBA)
  • White goods (Washing, Cold, Aircon ,...)
  • Power up sequencing