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  • EPM7064LC68-10

EPM7064LC68-10

1.27mm PMIC 68 Pin 125MHz 5V PLCC


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7064LC68-10
  • Package: PLCC
  • Datasheet: PDF
  • Stock: 374
  • Description: 1.27mm PMIC 68 Pin 125MHz 5V PLCC (Kg)

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Details

Tags

Parameters
Mount Surface Mount
Package / Case PLCC
Number of Pins 68
Published 1996
JESD-609 Code e0
Pbfree Code no
Part Status Discontinued
Moisture Sensitivity Level (MSL) 2
Number of Terminations 68
Terminal Finish Tin/Lead (Sn/Pb)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 220
Supply Voltage 5V
Terminal Pitch 1.27mm
Frequency 125MHz
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 68
Operating Supply Voltage 5V
Temperature Grade COMMERCIAL
Max Supply Voltage 5.25V
Min Supply Voltage 4.75V
Number of I/O 52
Memory Type EEPROM
Propagation Delay 10 ns
Turn On Delay Time 10 ns
Frequency (Max) 151.5MHz
Programmable Logic Type EE PLD
Number of Gates 1250
Number of Programmable I/O 52
Number of Logic Blocks (LABs) 4
Speed Grade 10
Output Function MACROCELL
Number of Macro Cells 64
JTAG BST NO
In-System Programmable NO
Height Seated (Max) 5.08mm
Radiation Hardening No
RoHS Status RoHS Compliant
Lead Free Contains Lead

EPM7064LC68-10 Overview


There are 64 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).It is contained in package [0].There are 52 I/Os on the board.It is programmed that device terminations will be 68 .The terminal position of this electrical component is QUAD.Power is provided by a supply voltage of 5V volts.There is a part in the family [0].It is programmed with 68 pins.Additionally, this device is capable of displaying [0].As a building block for digital circuits, there are 1250gates.In order to maintain high efficiency, the supply voltage should be maintained at [0].It is recommended to store data in [0].Surface Mountis the mounting point of this electronic part.There are 68 pins on the device.A voltage of 5.25V is the maximum supply voltage for this device.It operates with the minimal supply voltage of 4.75V.A total of 52programmable I/Os are available.This frequency is 125MHz.Ideally, the operating temperature should be greater than 0°C.It is recommended that the operating temperature be lower than 70°C.There are 4 logic blocks (LABs) in its basic building block.Maximum frequency should be less than 151.5MHz.Types of programmable logic are divided into EE PLD.

EPM7064LC68-10 Features


PLCC package
52 I/Os
68 pin count
68 pins
4 logic blocks (LABs)

EPM7064LC68-10 Applications


There are a lot of Altera EPM7064LC68-10 CPLDs applications.

  • Multiple DIP Switch Replacement
  • State machine control
  • Timing control
  • Programmable polarity
  • Complex programmable logic devices
  • Programmable power management
  • Field programmable gate
  • I2C BUS INTERFACE
  • Pattern recognition
  • Parity generators