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  • EPM7064LC68-12

EPM7064LC68-12

1.27mm PMIC 68 Pin 125MHz 5V PLCC


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7064LC68-12
  • Package: PLCC
  • Datasheet: PDF
  • Stock: 703
  • Description: 1.27mm PMIC 68 Pin 125MHz 5V PLCC (Kg)

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Details

Tags

Parameters
Mount Surface Mount
Package / Case PLCC
Number of Pins 68
Published 1998
JESD-609 Code e0
Pbfree Code no
Part Status Active
Moisture Sensitivity Level (MSL) 2
Number of Terminations 68
Terminal Finish Tin/Lead (Sn/Pb)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 220
Supply Voltage 5V
Terminal Pitch 1.27mm
Frequency 125MHz
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 68
Operating Supply Voltage 5V
Temperature Grade COMMERCIAL
Max Supply Voltage 5.25V
Min Supply Voltage 4.75V
Number of I/O 52
Memory Type EEPROM
Propagation Delay 12 ns
Turn On Delay Time 12 ns
Frequency (Max) 151.5MHz
Programmable Logic Type EE PLD
Number of Gates 1250
Number of Programmable I/O 52
Number of Logic Blocks (LABs) 4
Speed Grade 12
Output Function MACROCELL
Number of Macro Cells 64
JTAG BST NO
In-System Programmable NO
Height Seated (Max) 5.08mm
Radiation Hardening No
RoHS Status RoHS Compliant
Lead Free Contains Lead

EPM7064LC68-12 Overview


A mobile phone network consists of 64macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).It is part of the PLCC package.The device has 52inputs and outputs.It is programmed that device terminations will be 68 .The terminal position of this electrical component is QUAD.Power is provided by a supply voltage of 5V volts.It is included in Programmable Logic Devices.Chips are programmed with 68 pins.Additionally, this device is capable of displaying [0].1250gates are devices that serve as building blocks for digital circuits.High efficiency requires the supply voltage to be maintained at [0].It is adopted to store data in [0].Surface Mountis the mounting point of this electronic part.This board has 68 pins.There is a maximum supply voltage of 5.25Vwhen the device is operating.In order for it to operate, a supply voltage of 4.75Vis required.Currently, there are 52 Programmable I/Os available.There is 125MHz frequency that can be achieved.There should be a temperature above 0°Cat the time of operation.A temperature below 70°Cshould be used as the operating temperature.The program consists of 4 logic blocks (LABs).Maximum frequency should be less than 151.5MHz.A programmable logic type can be categorized as EE PLD.

EPM7064LC68-12 Features


PLCC package
52 I/Os
68 pin count
68 pins
4 logic blocks (LABs)

EPM7064LC68-12 Applications


There are a lot of Altera EPM7064LC68-12 CPLDs applications.

  • Boolean function generators
  • Multiple Clock Source Selection
  • I/O PORTS (MCU MODULE)
  • State machine design
  • Parity generators
  • Complex programmable logic devices
  • Storage Cards and Storage Racks
  • Voltage level translation
  • Power up sequencing
  • Bootloaders for FPGAs