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EPM7064LI68-15

1.27mm PMIC 68 Pin 100MHz 5V PLCC


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7064LI68-15
  • Package: PLCC
  • Datasheet: PDF
  • Stock: 327
  • Description: 1.27mm PMIC 68 Pin 100MHz 5V PLCC (Kg)

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Details

Tags

Parameters
Factory Lead Time 41 Weeks
Mount Surface Mount
Package / Case PLCC
Number of Pins 68
Published 1998
JESD-609 Code e0
Pbfree Code no
Part Status Active
Moisture Sensitivity Level (MSL) 2
Number of Terminations 68
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn/Pb)
Max Operating Temperature 85°C
Min Operating Temperature -40°C
Additional Feature CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 220
Supply Voltage 5V
Terminal Pitch 1.27mm
Frequency 100MHz
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 68
Operating Supply Voltage 5V
Temperature Grade INDUSTRIAL
Max Supply Voltage 5.5V
Min Supply Voltage 4.5V
Number of I/O 52
Memory Type EEPROM
Propagation Delay 15 ns
Turn On Delay Time 15 ns
Frequency (Max) 151.5MHz
Programmable Logic Type EE PLD
Number of Gates 1250
Number of Programmable I/O 52
Number of Logic Blocks (LABs) 4
Speed Grade 15
Output Function MACROCELL
Number of Macro Cells 64
JTAG BST NO
In-System Programmable NO
Height Seated (Max) 5.08mm
Radiation Hardening No
RoHS Status RoHS Compliant
Lead Free Contains Lead

EPM7064LI68-15 Overview


The mobile phone network has 64 macro cells, which are cells that provide radio coverage from high-power cell sites (towers, antennas, or masts).The item is packaged with PLCC.In this case, there are 52 I/Os programmed.There is a 68terminations set on devices.This electrical part is wired with a terminal position of QUAD.The power source is powered by 5Vvolts.This part is part of the family [0].In this chip, the 68pins are programmed.If this device is used, you will also be able to find [0].For digital circuits, there are 1250gates. These devices serve as building blocks.High efficiency requires a voltage supply of [0].For data storage, EEPROMis adopted.Surface Mountis used to mount this electronic component.There are 68 pins embedded in the device.A maximum voltage of 5.5Vis required for operation.With a minimal supply voltage of [0], it operates.There are 52 Programmable I/Os.There is a maximum frequency of 100MHz.Ideally, the operating temperature should be greater than -40°C.Ideally, the operating temperature should be below 85°C.Its basic building block is composed of 4 logic blocks (LABs).It is recommended that the maximum frequency is less than 0.It is possible to classify programmable logic as EE PLD.

EPM7064LI68-15 Features


PLCC package
52 I/Os
68 pin count
68 pins
4 logic blocks (LABs)

EPM7064LI68-15 Applications


There are a lot of Altera EPM7064LI68-15 CPLDs applications.

  • Programmable polarity
  • DDC INTERFACE
  • Power automation
  • Network Interface Card (NIC) and Host Bus Adapter (HBA)
  • PLC analog input modules
  • Digital designs
  • High speed graphics processing
  • Storage Cards and Storage Racks
  • Preset swapping
  • ON-CHIP OSCILLATOR CIRCUIT