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EPM7064QC100-12

3.3/55V 0.65mm PMIC 100 Pin 125MHz 5V PQFP


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7064QC100-12
  • Package: PQFP
  • Datasheet: PDF
  • Stock: 387
  • Description: 3.3/55V 0.65mm PMIC 100 Pin 125MHz 5V PQFP (Kg)

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Details

Tags

Parameters
Mount Surface Mount
Package / Case PQFP
Number of Pins 100
Published 1998
JESD-609 Code e0
Pbfree Code no
Part Status Discontinued
Moisture Sensitivity Level (MSL) 3
Number of Terminations 100
Terminal Finish Tin/Lead (Sn/Pb)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 220
Supply Voltage 5V
Terminal Pitch 0.65mm
Frequency 125MHz
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 100
Qualification Status Not Qualified
Power Supplies 3.3/55V
Temperature Grade COMMERCIAL
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Number of I/O 68
Memory Type EEPROM
Propagation Delay 12 ns
Frequency (Max) 151.5MHz
Programmable Logic Type EE PLD
Number of Gates 1250
Number of Programmable I/O 68
Number of Logic Blocks (LABs) 4
Output Function MACROCELL
Number of Macro Cells 64
JTAG BST NO
In-System Programmable NO
Height Seated (Max) 3.65mm
Length 20mm
RoHS Status RoHS Compliant

EPM7064QC100-12 Overview


There are 64 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).It is embedded in the PQFP package.There are 68 I/Os on the board.The termination of a device is set to [0].QUADis the terminal position of this electrical part.The power supply voltage is 5V.This part is in the family [0].It is programmed with 100 pins.This device also displays [0].As a building block for digital circuits, there are 1250gates.EEPROM is adopted for storing data.This electronic part is mounted in the way of Surface Mount.The 100pins are designed into the board.There is a maximum supply voltage of 3.6Vwhen the device is operating.A minimum supply voltage of 3V is required for it to operate.It operates from 3.3/55V power supplies.A total of 68programmable I/Os are available.In this case, 125MHzis the frequency that can be achieved.It is recommended that the operating temperature exceed 0°C.Ideally, the operating temperature should be below 70°C.In total, it contains 4 logic blocks (LABs).It should be below 151.5MHzat the maximal frequency.A programmable logic type can be categorized as EE PLD.

EPM7064QC100-12 Features


PQFP package
68 I/Os
100 pin count
100 pins
3.3/55V power supplies
4 logic blocks (LABs)

EPM7064QC100-12 Applications


There are a lot of Altera EPM7064QC100-12 CPLDs applications.

  • Power up sequencing
  • Programmable polarity
  • INTERRUPT SYSTEM
  • Cross-Matrix Switch
  • SUPERVISORY FUNCTION (LVD AND WATCHDOG)
  • Page register
  • ROM patching
  • Custom shift registers
  • Digital multiplexers
  • D/T registers and latches