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EPM7064QC100-7

3.3/55V 0.65mm PMIC 100 Pin 166.7MHz 5V PQFP


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7064QC100-7
  • Package: PQFP
  • Datasheet: PDF
  • Stock: 131
  • Description: 3.3/55V 0.65mm PMIC 100 Pin 166.7MHz 5V PQFP (Kg)

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Details

Tags

Parameters
Factory Lead Time 12 Weeks
Mount Surface Mount
Package / Case PQFP
Number of Pins 100
Published 1998
JESD-609 Code e0
Pbfree Code no
Part Status Discontinued
Moisture Sensitivity Level (MSL) 3
Number of Terminations 100
Terminal Finish Tin/Lead (Sn/Pb)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 220
Supply Voltage 5V
Terminal Pitch 0.65mm
Frequency 166.7MHz
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 100
Power Supplies 3.3/55V
Temperature Grade COMMERCIAL
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Number of I/O 68
Memory Type EEPROM
Propagation Delay 7.5 ns
Turn On Delay Time 7.5 ns
Frequency (Max) 151.5MHz
Programmable Logic Type EE PLD
Number of Gates 1250
Number of Programmable I/O 68
Number of Logic Blocks (LABs) 4
Speed Grade 7
Output Function MACROCELL
Number of Macro Cells 64
JTAG BST NO
In-System Programmable NO
Height Seated (Max) 3.65mm
Length 20mm
Radiation Hardening No
RoHS Status RoHS Compliant

EPM7064QC100-7 Overview


There are 64 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.It is part of the PQFP package.In this case, there are 68 I/Os programmed.The termination of a device is set to [0].QUADis the terminal position of this electrical part.Power is provided by a supply voltage of 5V volts.It is a part of family [0].It has 100pins programmed.Additionally, this device is capable of displaying [0].1250gates are devices that serve as building blocks for digital circuits.Data storage is performed using [0].A Surface Mountis mounted on this electronic component.There are 100 pins embedded in the device.In this case, the maximum supply voltage is 3.6V.The device is designed to operate with a minimal supply voltage of 3VV.A power supply of 3.3/55Vis required to operate it.A total of 68programmable I/Os are available.This frequency can be achieved at 166.7MHz.There should be a temperature above 0°Cat the time of operation.Temperatures should not exceed 70°C.There are 4 logic blocks (LABs) in its basic building block.It should be below 151.5MHzat the maximal frequency.This kind of FPGA is composed of EE PLD.

EPM7064QC100-7 Features


PQFP package
68 I/Os
100 pin count
100 pins
3.3/55V power supplies
4 logic blocks (LABs)

EPM7064QC100-7 Applications


There are a lot of Altera EPM7064QC100-7 CPLDs applications.

  • Code converters
  • Boolean function generators
  • Protection relays
  • Multiple DIP Switch Replacement
  • ON-CHIP OSCILLATOR CIRCUIT
  • Interface bridging
  • White goods (Washing, Cold, Aircon ,...)
  • Complex programmable logic devices
  • POWER-SAVING MODES
  • DMA control