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  • EPM7064SLC84-7N

EPM7064SLC84-7N

3.3/55V PMIC 84 Pin 166.7MHz 5V PLCC


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7064SLC84-7N
  • Package: PLCC
  • Datasheet: PDF
  • Stock: 309
  • Description: 3.3/55V PMIC 84 Pin 166.7MHz 5V PLCC (Kg)

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Details

Tags

Parameters
Factory Lead Time 12 Weeks
Mount Surface Mount
Package / Case PLCC
Number of Pins 84
Published 1998
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3
Number of Terminations 84
ECCN Code EAR99
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 245
Supply Voltage 5V
Frequency 166.7MHz
Time@Peak Reflow Temperature-Max (s) 40
Pin Count 84
Qualification Status Not Qualified
Power Supplies 3.3/55V
Temperature Grade COMMERCIAL
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Number of I/O 68
Memory Type EEPROM
Propagation Delay 7.5 ns
Turn On Delay Time 7.5 ns
Frequency (Max) 175.4MHz
Programmable Logic Type EE PLD
Number of Gates 1250
Number of Programmable I/O 68
Number of Logic Blocks (LABs) 4
Speed Grade 7
Output Function MACROCELL
Number of Macro Cells 64
JTAG BST NO
In-System Programmable YES
Height Seated (Max) 5.08mm
Length 29.3116mm
Width 29.3116mm
RoHS Status RoHS Compliant

EPM7064SLC84-7N Overview


In the mobile phone network, there are 64macro cells, which are cells with high-power antennas and towers.You can find it in package [0].There are 68 I/Os on the board.The termination of a device is set to [0].QUADis the terminal position of this electrical part.An electrical supply voltage of 5V is used to power it.There is a part in the family [0].It is equipped with 84 pin count.When using this device, CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vis also available.1250gates are used to construct digital circuits.It is recommended to store data in [0].A Surface Mountis mounted on this electronic component.84pins are included in its design.A voltage of 3.6V is the maximum supply voltage for this device.Despite its minimal supply voltage of [0], it is capable of operating.There is 3.3/55V power supply available for it.There are 68 programmable I/Os, which are method of data transmissions, via input/output (I/O), between a central processing unit (CPU) and a peripheral device, such as a network adapter or a Parallel ATA storage device. The frequency that can be achieved is 166.7MHz.It is recommended that the operating temperature exceeds 0°C.A temperature less than 70°Cshould be used for operation.It is composed of 4 logic blocks (LABs).The maximum frequency should not exceed 175.4MHz.Types of programmable logic are divided into EE PLD.

EPM7064SLC84-7N Features


PLCC package
68 I/Os
84 pin count
84 pins
3.3/55V power supplies
4 logic blocks (LABs)

EPM7064SLC84-7N Applications


There are a lot of Altera EPM7064SLC84-7N CPLDs applications.

  • D/T registers and latches
  • Battery operated portable devices
  • USB Bus
  • Storage Cards and Storage Racks
  • Power Meter SMPS
  • ROM patching
  • Custom shift registers
  • Parity generators
  • Voltage level translation
  • Multiple DIP Switch Replacement