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EPM7064STC44-10FN
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Shipping Cost
Shipping starts at $40, but some countries will exceed $40. For
example (South Africa, Brazil, India, Pakistan, Israel, etc.)
The
basic freight (for package ≤0.5kg or corresponding volume) depends on the time zone and
country.
Currently, our products are shipped through DHL, FedEx, SF, and UPS.
Delivery TimeOnce the goods are shipped, estimated delivery time depends on the shipping methods you chose:
FedEx International, 5-7 business days.
The following are some common countries' logistic time.
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | TQFP |
| Number of Pins | 44 |
| Published | 1998 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 44 |
| ECCN Code | EAR99 |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.8mm |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Pin Count | 44 |
| Operating Supply Voltage | 5V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Number of I/O | 36 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 175.4MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1250 |
| Number of Programmable I/O | 36 |
| Number of Logic Blocks (LABs) | 4 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| Height | 950μm |
| Length | 10mm |
| Width | 10mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
EPM7064STC44-10FN Overview
There are 64 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).TQFPis the package in which it resides.As a result, it has 36 I/O ports programmed.It is programmed that device terminations will be 44 .The terminal position of this electrical component is QUAD.A voltage of 5V is used as the power supply for this device.It is programmed with 44 pins.There are 1250 gates, which are devices that acts as a building block for digital circuits. In order to achieve high efficiency, the supply voltage should be maintained at [0].In general, it is recommended to store data in [0].In this case, Surface Mountis used to mount the electronic component.44pins are included in its design.There is a maximum supply voltage of 5.25Vwhen the device is operating.Normally, it operates with a voltage of 4.75VV as its minimum supply voltage.A total of 36 Programmable I/Os are available.The frequency that can be achieved is 125MHz.It is recommended that the operating temperature exceed 0°C.A temperature below 70°Cshould be used as the operating temperature.It consists of 4 logic blocks (LABs).It should be below 175.4MHzat the maximal frequency.This kind of FPGA is composed of EE PLD.
EPM7064STC44-10FN Features
TQFP package
36 I/Os
44 pin count
44 pins
4 logic blocks (LABs)
EPM7064STC44-10FN Applications
There are a lot of Altera EPM7064STC44-10FN CPLDs applications.
- D/T registers and latches
- Custom state machines
- Configurable Addressing of I/O Boards
- PULSE WIDTH MODULATION (PWM)
- POWER-SAVING MODES
- ToR/Aggregation/Core Switch and Router
- Interface bridging
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- Address decoders
- Storage Cards and Storage Racks