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EPM7128SQC100-10F

3.3/55V 0.65mm PMIC 100 Pin 125MHz 5V PQFP


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7128SQC100-10F
  • Package: PQFP
  • Datasheet: PDF
  • Stock: 224
  • Description: 3.3/55V 0.65mm PMIC 100 Pin 125MHz 5V PQFP (Kg)

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Details

Tags

Parameters
Factory Lead Time 12 Weeks
Mount Surface Mount
Package / Case PQFP
Number of Pins 100
Packaging Bulk
Published 1998
JESD-609 Code e0
Pbfree Code no
Part Status Discontinued
Moisture Sensitivity Level (MSL) 3
Number of Terminations 100
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn/Pb)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature YES
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 220
Supply Voltage 5V
Terminal Pitch 0.65mm
Reach Compliance Code not_compliant
Frequency 125MHz
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 100
Qualification Status Not Qualified
Operating Supply Voltage 3.3V
Power Supplies 3.3/55V
Temperature Grade COMMERCIAL
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Number of I/O 84
Memory Type EEPROM
Propagation Delay 10 ns
Turn On Delay Time 10 ns
Frequency (Max) 147.1MHz
Programmable Logic Type EE PLD
Number of Gates 2500
Number of Programmable I/O 84
Number of Logic Blocks (LABs) 8
Output Function MACROCELL
Number of Macro Cells 128
JTAG BST YES
In-System Programmable YES
Height Seated (Max) 3.65mm
Length 20mm
Width 14mm
RoHS Status Non-RoHS Compliant
Lead Free Contains Lead

EPM7128SQC100-10F Overview


The mobile phone network has 128 macro cells, which are cells that provide radio coverage from high-power cell sites (towers, antennas, or masts).There is a PQFP package containing it.There are 84 I/Os programmed in it.The termination of a device is set to [0].The terminal position of this electrical component is QUAD.An electrical supply voltage of 5V is used to power it.This part is included in Programmable Logic Devices.It is recommended to package the chip by Bulk.A chip with 100pins is programmed.When using this device, YESis also available.It is possible to construct digital circuits using 2500gates, which are devices that serve as building blocks.Optimal efficiency requires a supply voltage of [0].EEPROM is adopted for storing data.This device is mounted by Surface Mount.The pins are [0].It operates with the maximal supply voltage of 3.6V.Initially, it requires a voltage of 3Vas the minimum supply voltage.A power supply of 3.3/55Vvolts is required to operate this device.A programmable I/O count of 84 has been recorded.This can be achieved at a frequency of 125MHz.In order to operate, the temperature should be higher than 0°C.A temperature lower than 70°Cis recommended for operation.There are 8logic blocks (LABs) that make up its basic building block.The maximal frequency should be lower than 147.1MHz.There are several types of programmable logic that can be categorized as EE PLD.

EPM7128SQC100-10F Features


PQFP package
84 I/Os
100 pin count
100 pins
3.3/55V power supplies
8 logic blocks (LABs)

EPM7128SQC100-10F Applications


There are a lot of Altera EPM7128SQC100-10F CPLDs applications.

  • ANALOG-TO-DIGITAL CONVERTOR (ADC)
  • Handheld digital devices
  • Custom shift registers
  • STANDARD SERIAL INTERFACE UART
  • Digital systems
  • USB Bus
  • Boolean function generators
  • ROM patching
  • Battery operated portable devices
  • Pattern recognition