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EPM7128SQC100-7N

0.65mm PMIC 100 Pin 147.1MHz 5V PQFP


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7128SQC100-7N
  • Package: PQFP
  • Datasheet: PDF
  • Stock: 845
  • Description: 0.65mm PMIC 100 Pin 147.1MHz 5V PQFP (Kg)

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Details

Tags

Parameters
Mount Surface Mount
Package / Case PQFP
Number of Pins 100
Published 1998
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3
Number of Terminations 100
ECCN Code EAR99
Terminal Finish Matte Tin (Sn)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 245
Supply Voltage 5V
Terminal Pitch 0.65mm
Frequency 147.1MHz
Time@Peak Reflow Temperature-Max (s) 40
Pin Count 100
Operating Supply Voltage 5V
Temperature Grade COMMERCIAL
Max Supply Voltage 5.25V
Min Supply Voltage 4.75V
Number of I/O 84
Memory Type EEPROM
Propagation Delay 7.5 ns
Turn On Delay Time 7.5 ns
Frequency (Max) 147.1MHz
Programmable Logic Type EE PLD
Number of Gates 2500
Number of Logic Blocks (LABs) 8
Speed Grade 7
Output Function MACROCELL
Number of Macro Cells 128
JTAG BST YES
In-System Programmable YES
Height Seated (Max) 3.65mm
Length 20mm
Width 14mm
Radiation Hardening No
REACH SVHC Unknown
RoHS Status RoHS Compliant
Lead Free Lead Free

EPM7128SQC100-7N Overview


There are 128 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.The item is enclosed in a PQFP package.The device is programmed with 84 I/Os.The device is programmed with 100 terminations.This electrical component has a terminal position of 0.It is powered by a voltage of 5V volts.It is a part of the family [0].There are 100pins on the chip.When using this device, CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vis also available.There are 2500 gates, which are devices that acts as a building block for digital circuits. In order to achieve high efficiency, the supply voltage should be maintained at [0].For storing data, it is recommended to use [0].Surface Mountis the mounting point of this electronic part.This board has 100 pins.There is a maximum supply voltage of 5.25V.With a minimal supply voltage of [0], it operates.There can be 147.1MHz frequency achieved.It is recommended that the operating temperature be greater than 0°C.Temperatures should not exceed 70°C.There are 8 logic blocks (LABs) in its basic building block.There should be a lower maximum frequency than 147.1MHz.In programmable logic, a type of logic can be categorized as EE PLD.

EPM7128SQC100-7N Features


PQFP package
84 I/Os
100 pin count
100 pins
8 logic blocks (LABs)

EPM7128SQC100-7N Applications


There are a lot of Altera EPM7128SQC100-7N CPLDs applications.

  • Bootloaders for FPGAs
  • PULSE WIDTH MODULATION (PWM)
  • Voltage level translation
  • TIMERS/COUNTERS
  • High speed graphics processing
  • Configurable Addressing of I/O Boards
  • DMA control
  • Parity generators
  • POWER-SAVING MODES
  • Handheld digital devices