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  • EPM7160EQC100-12

EPM7160EQC100-12

0.65mm PMIC 100 Pin 125MHz 5V PQFP


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7160EQC100-12
  • Package: PQFP
  • Datasheet: PDF
  • Stock: 243
  • Description: 0.65mm PMIC 100 Pin 125MHz 5V PQFP (Kg)

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Details

Tags

Parameters
Factory Lead Time 8 Weeks
Mount Surface Mount
Package / Case PQFP
Number of Pins 100
Published 1998
JESD-609 Code e0
Pbfree Code no
Moisture Sensitivity Level (MSL) 3
Number of Terminations 100
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn/Pb)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 220
Supply Voltage 5V
Terminal Pitch 0.65mm
Frequency 125MHz
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 100
Qualification Status Not Qualified
Operating Supply Voltage 5V
Temperature Grade COMMERCIAL
Max Supply Voltage 5.25V
Min Supply Voltage 4.75V
Number of I/O 84
Memory Type EEPROM
Propagation Delay 12 ns
Turn On Delay Time 12 ns
Frequency (Max) 100MHz
Programmable Logic Type EE PLD
Number of Gates 3200
Number of Programmable I/O 84
Number of Logic Blocks (LABs) 10
Speed Grade 12
Output Function MACROCELL
Number of Macro Cells 160
JTAG BST NO
In-System Programmable NO
Height Seated (Max) 3.65mm
Length 20mm
Width 14mm
RoHS Status RoHS Compliant

EPM7160EQC100-12 Overview


In the mobile phone network, there are 160macro cells, which are cells with high-power antennas and towers.It is part of the PQFP package.It is equipped with 84I/O ports.There are 100 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.Its terminal position is QUAD.There is 5V voltage supply for this device.This part is in the family [0].There are 100pins on the chip.When using this device, CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vcan also be found.3200gates are used to construct digital circuits.A high level of efficiency can be achieved by maintaining the supply voltage at [0].For storing data, it is recommended to use [0].Surface Mountis used to mount this electronic component.The 100pins are designed into the board.There is a maximum supply voltage of 5.25Vwhen the device is operating.With a minimal supply voltage of [0], it operates.Currently, there are 84 Programmable I/Os available.The frequency that can be achieved is 125MHz.It is recommended that the operating temperature exceed 0°C.Ideally, the operating temperature should be below 70°C.The system consists of 10 logic blocks (LABs).If the maximal frequency is less than [0], it should be lower than that.This kind of FPGA is composed of EE PLD.

EPM7160EQC100-12 Features


PQFP package
84 I/Os
100 pin count
100 pins
10 logic blocks (LABs)

EPM7160EQC100-12 Applications


There are a lot of Altera EPM7160EQC100-12 CPLDs applications.

  • Power automation
  • ROM patching
  • Page register
  • Digital systems
  • Battery operated portable devices
  • Wireless Infrastructure Base Band Unit and Remote Radio Unit
  • Custom shift registers
  • PULSE WIDTH MODULATION (PWM)
  • I/O expansion
  • Boolean function generators