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EPM7160SQC100-15

3.3/55V 0.65mm PMIC 5V PQFP

Manufacturer: Altera
Origchip NO: 2936-EPM7160SQC100-15
Package: PQFP
Datasheet: -
Stock: 703
Description: 3.3/55V 0.65mm PMIC 5V PQFP (Kg)

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Details

Tags

Parameters
Package / Case	PQFP
Surface Mount	YES
JESD-609 Code	e0
Pbfree Code	no
Moisture Sensitivity Level (MSL)	3
Number of Terminations	100
Terminal Finish	Tin/Lead (Sn/Pb)
Additional Feature	CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
HTS Code	8542.39.00.01
Subcategory	Programmable Logic Devices
Technology	CMOS
Terminal Position	QUAD
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	220
Supply Voltage	5V
Terminal Pitch	0.65mm
Time@Peak Reflow Temperature-Max (s)	30
Pin Count	100
Qualification Status	Not Qualified
Operating Temperature (Max)	70°C
Supply Voltage-Max (Vsup)	5.25V
Power Supplies	3.3/55V
Temperature Grade	COMMERCIAL
Supply Voltage-Min (Vsup)	4.75V
Number of I/O	80
Clock Frequency	76.9MHz
Propagation Delay	15 ns
Organization	0 DEDICATED INPUTS, 80 I/O
Programmable Logic Type	EE PLD
Number of Gates	3200
Number of Logic Blocks (LABs)	10
Output Function	MACROCELL
Number of Macro Cells	160
JTAG BST	YES
In-System Programmable	YES
Height Seated (Max)	3.65mm
Length	20mm
Width	14mm
RoHS Status	Non-RoHS Compliant

EPM7160SQC100-15 Overview

This network has 160macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).The item is enclosed in a PQFP package.There are 80 I/Os programmed in it.Terminations of devices are set to [0].The terminal position of this electrical part is QUAD, which serves as an important access point for passengers or freight.The power source is powered by 5Vvolts.It is a part of the family [0].A chip with 100pins is programmed.If this device is used, you will also be able to find [0].In digital circuits, 3200gates serve as building blocks.In order for the device to operate, it requires 3.3/55V power supplies.There is a maximum supply voltage (Vsup) of 5.25V.10logic blocks (LABs) make up this circuit.Ensure that the supply voltage (Vsup) exceeds 4.75V.The clock frequency of the device should not exceed 76.9MHz.Types of programmable logic are divided into EE PLD.Keep the operating temperature below 70°C.

EPM7160SQC100-15 Features

PQFP package
80 I/Os
100 pin count
3.3/55V power supplies
10 logic blocks (LABs)

EPM7160SQC100-15 Applications

There are a lot of Altera EPM7160SQC100-15 CPLDs applications.

Random logic replacement
Interface bridging
Cross-Matrix Switch
Voltage level translation
Programmable power management
TIMERS/COUNTERS
Power automation
Power up sequencing
Discrete logic functions
Software-driven hardware configuration