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EPM7192SQC160-15N

0.65mm PMIC 160 Pin 100MHz 5V PQFP


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7192SQC160-15N
  • Package: PQFP
  • Datasheet: PDF
  • Stock: 862
  • Description: 0.65mm PMIC 160 Pin 100MHz 5V PQFP (Kg)

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Details

Tags

Parameters
Mount Surface Mount
Package / Case PQFP
Number of Pins 160
Published 1998
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3
Number of Terminations 160
ECCN Code EAR99
Terminal Finish Matte Tin (Sn)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 245
Supply Voltage 5V
Terminal Pitch 0.65mm
Frequency 100MHz
Time@Peak Reflow Temperature-Max (s) 40
Pin Count 160
Operating Supply Voltage 5V
Temperature Grade COMMERCIAL
Max Supply Voltage 5.25V
Min Supply Voltage 4.75V
Number of I/O 124
Memory Type EEPROM
Propagation Delay 15 ns
Turn On Delay Time 15 ns
Frequency (Max) 125MHz
Programmable Logic Type EE PLD
Number of Gates 3750
Number of Programmable I/O 124
Number of Logic Blocks (LABs) 12
Speed Grade 15
Output Function MACROCELL
Number of Macro Cells 192
JTAG BST YES
In-System Programmable YES
Height Seated (Max) 4.07mm
Length 28mm
Width 28mm
Radiation Hardening No
RoHS Status RoHS Compliant
Lead Free Lead Free

EPM7192SQC160-15N Overview


There are 192 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).It is contained in package [0].As you can see, this device has 124 I/O ports programmed into it.There are 160 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.This electrical part is wired with a terminal position of QUAD.The power source is powered by 5Vvolts.There is a part included in Programmable Logic Devices.160pins are programmed on the chip.When using this device, CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vcan also be found.3750gates are used to construct digital circuits.High efficiency requires a voltage supply of [0].Data storage is performed using [0].It is mounted by Surface Mount.There are 160 pins embedded in the device.There is a maximum supply voltage of 5.25Vwhen the device is operating.It operates with the minimal supply voltage of 4.75V.A total of 124programmable I/Os are available.In this case, 100MHzis the frequency that can be achieved.The operating temperature should be higher than 0°C.A temperature below 70°Cshould be used as the operating temperature.In its simplest form, it consists of 12 logic blocks (LABs).It is recommended that the maximal frequency be lower than 125MHz.In programmable logic, a type of logic can be categorized as EE PLD.

EPM7192SQC160-15N Features


PQFP package
124 I/Os
160 pin count
160 pins
12 logic blocks (LABs)

EPM7192SQC160-15N Applications


There are a lot of Altera EPM7192SQC160-15N CPLDs applications.

  • Digital systems
  • Wireless Infrastructure Base Band Unit and Remote Radio Unit
  • Digital multiplexers
  • Page register
  • D/T registers and latches
  • Storage Cards and Storage Racks
  • Portable digital devices
  • Configurable Addressing of I/O Boards
  • Custom shift registers
  • Code converters