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EPM7256AEFC100-7

1mm PMIC 100 Pin 166.67MHz 3.3V FBGA


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7256AEFC100-7
  • Package: FBGA
  • Datasheet: PDF
  • Stock: 112
  • Description: 1mm PMIC 100 Pin 166.67MHz 3.3V FBGA (Kg)

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Details

Tags

Parameters
Factory Lead Time 10 Weeks
Mount Surface Mount
Package / Case FBGA
Number of Pins 100
Published 1998
JESD-609 Code e0
Pbfree Code no
Moisture Sensitivity Level (MSL) 3
Number of Terminations 100
ECCN Code 3A991
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature YES
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 235
Supply Voltage 3.3V
Terminal Pitch 1mm
Frequency 166.67MHz
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 100
Qualification Status Not Qualified
Operating Supply Voltage 3.3V
Temperature Grade COMMERCIAL
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Number of I/O 84
Memory Type EEPROM
Propagation Delay 7.5 ns
Turn On Delay Time 7.5 ns
Frequency (Max) 172.4MHz
Programmable Logic Type EE PLD
Number of Gates 5000
Number of Programmable I/O 84
Number of Logic Blocks (LABs) 16
Speed Grade 7
Output Function MACROCELL
Number of Macro Cells 256
JTAG BST YES
In-System Programmable YES
Length 11mm
Width 11mm
RoHS Status RoHS Compliant

EPM7256AEFC100-7 Overview


256 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.You can find it in package [0].This device has 84 I/O ports programmed into it.There is a 100terminations set on devices.This electrical part has a terminal position of BOTTOMand is connected to the ground.The device is powered by a voltage of 3.3V volts.It is included in Programmable Logic Devices.It has 100pins programmed.It is also possible to find YESwhen using this device.As a building block for digital circuits, there are 5000gates.High efficiency requires a voltage supply of [0].It is adopted to store data in [0].In this case, it is mounted by Surface Mount.This board has 100 pins.With a maximum supply voltage of [0], it operates.A minimum supply voltage of 3V is required for it to operate.A total of 84programmable I/Os are available.You can achieve 166.67MHzfrequencies.It is recommended that the operating temperature be higher than 0°C.The operating temperature should be lower than 70°C.The system consists of 16 logic blocks (LABs).The maximum frequency should not exceed 172.4MHz.Programmable logic types can be divided into EE PLD.

EPM7256AEFC100-7 Features


FBGA package
84 I/Os
100 pin count
100 pins
16 logic blocks (LABs)

EPM7256AEFC100-7 Applications


There are a lot of Altera EPM7256AEFC100-7 CPLDs applications.

  • PULSE WIDTH MODULATION (PWM)
  • State machine design
  • ROM patching
  • Address decoders
  • ON-CHIP OSCILLATOR CIRCUIT
  • Power automation
  • Protection relays
  • POWER-SAVING MODES
  • Programmable power management
  • I/O expansion