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  • EPM7256AEFC256-5N

EPM7256AEFC256-5N

1mm PMIC 256 Pin 250MHz 3.3V FBGA


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7256AEFC256-5N
  • Package: FBGA
  • Datasheet: PDF
  • Stock: 539
  • Description: 1mm PMIC 256 Pin 250MHz 3.3V FBGA (Kg)

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Details

Tags

Parameters
Number of Terminations 256
ECCN Code 3A991
Terminal Finish Tin/Silver/Copper (Sn/Ag/Cu)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature YES
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 1mm
Reach Compliance Code unknown
Frequency 250MHz
Time@Peak Reflow Temperature-Max (s) 40
Pin Count 256
Qualification Status Not Qualified
Operating Supply Voltage 3.3V
Temperature Grade COMMERCIAL
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Number of I/O 164
Memory Type EEPROM
Propagation Delay 5.5 ns
Turn On Delay Time 5.5 ns
Frequency (Max) 172.4MHz
Programmable Logic Type EE PLD
Number of Gates 5000
Number of Programmable I/O 164
Number of Logic Blocks (LABs) 16
Speed Grade 5
Output Function MACROCELL
Number of Macro Cells 256
JTAG BST YES
In-System Programmable YES
Height Seated (Max) 2.1mm
Length 17mm
Width 17mm
RoHS Status RoHS Compliant
Factory Lead Time 10 Weeks
Mount Surface Mount
Package / Case FBGA
Number of Pins 256
Published 1998
JESD-609 Code e1
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3

EPM7256AEFC256-5N Overview


There are 256 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.It is contained in package [0].The device is programmed with 164 I/O ports.256terminations are programmed into the device.The terminal position of this electrical component is BOTTOM.The device is powered by a voltage of 3.3V volts.This part is in the family [0].There are 256 pins on the chip.If you use this device, you will also find [0].For digital circuits, there are 5000gates. These devices serve as building blocks.A high level of efficiency can be achieved by maintaining the supply voltage at [0].For data storage, EEPROMis adopted.It is mounted by Surface Mount.256pins are included in its design.It operates at a maximum supply voltage of 3.6V volts.Normally, it operates with a voltage of 3VV as its minimum supply voltage.A programmable I/O count of 164 has been recorded.There is 250MHz frequency that can be achieved.Operating temperatures should be higher than 0°C.Temperatures should not exceed 70°C.There are 16 logic blocks (LABs) in its basic building block.It is recommended that the maximal frequency be less than 0.There is a type of programmable logic called EE PLD.

EPM7256AEFC256-5N Features


FBGA package
164 I/Os
256 pin count
256 pins
16 logic blocks (LABs)

EPM7256AEFC256-5N Applications


There are a lot of Altera EPM7256AEFC256-5N CPLDs applications.

  • Multiple Clock Source Selection
  • Digital designs
  • DMA control
  • PULSE WIDTH MODULATION (PWM)
  • Wide Vin Industrial low power SMPS
  • Custom state machines
  • Software-driven hardware configuration
  • ROM patching
  • Bootloaders for FPGAs
  • Discrete logic functions